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SN74ALS576BN3 PDF预览

SN74ALS576BN3

更新时间: 2024-11-15 23:13:55
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
18页 623K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SN74ALS576BN3 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP20,.3针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.49系列:ALS
JESD-30 代码:R-PDIP-T20长度:25.4 mm
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:30000000 Hz
最大I(ol):0.024 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):30 mA传播延迟(tpd):14 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

SN74ALS576BN3 数据手册

 浏览型号SN74ALS576BN3的Datasheet PDF文件第2页浏览型号SN74ALS576BN3的Datasheet PDF文件第3页浏览型号SN74ALS576BN3的Datasheet PDF文件第4页浏览型号SN74ALS576BN3的Datasheet PDF文件第5页浏览型号SN74ALS576BN3的Datasheet PDF文件第6页浏览型号SN74ALS576BN3的Datasheet PDF文件第7页 
SN54ALS576B, SN54AS576  
SN74ALS576B, SN74ALS577A, SN74AS576  
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS  
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995  
SN54ALS576B, SN54AS576 . . . J OR W PACKAGE  
SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Inverting Outputs Drive  
Bus Lines Directly  
Bus-Structured Pinout  
Buffered Control Inputs  
SN74ALS577A Has Synchronous Clear  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), Standard Plastic (N, NT)  
and Ceramic (J) 300-mil DIPs, and Ceramic  
Flat (W) Packages  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
13 7Q  
12 8Q  
description  
11  
GND  
CLK  
These octal D-type edge-triggered flip-flops  
feature 3-state outputs designed specifically for  
bus driving. They are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
SN54ALS576B, SN54AS576 . . . FK PACKAGE  
(TOP VIEW)  
These flip-flops enter data on the low-to-high  
transition of the clock (CLK) input.  
3
2
1
20 19  
18  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
The output-enable (OE) input does not affect  
internal operations of the flip-flops. Old data can  
be retained or new data can be entered while the  
outputs are disabled.  
17  
16  
15  
14  
9 10 11 12 13  
The SN54ALS576B and SN54AS576 are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS576B,  
SN74AS576 are characterized for operation from  
0°C to 70°C.  
SN74ALS577A,  
and  
SN74ALS577A . . . DW OR NT PACKAGE  
(TOP VIEW)  
CLR  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
NC  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
CLK  
NC  
2
3
4
5
6
7
8
9
8D  
NC  
GND  
10  
11  
12  
NC – No internal connection  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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