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SN74AHCT374NSRE4

更新时间： 2024-11-30 05:24:59
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德州仪器 - TI 触发器输出元件
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19页 703K
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OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN74AHCT374NSRE4 数据手册

 浏览型号SN74AHCT374NSRE4的Datasheet PDF文件第2页浏览型号SN74AHCT374NSRE4的Datasheet PDF文件第3页浏览型号SN74AHCT374NSRE4的Datasheet PDF文件第4页浏览型号SN74AHCT374NSRE4的Datasheet PDF文件第5页浏览型号SN74AHCT374NSRE4的Datasheet PDF文件第6页浏览型号SN74AHCT374NSRE4的Datasheet PDF文件第7页 
SN54AHCT374, SN74AHCT374  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCLS241L – OCTOBER 1995 – REVISED JULY 2003  
Inputs Are TTL-Voltage Compatible  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
– 1000-V Charged-Device Model (C101)  
SN54AHCT374 . . . J OR W PACKAGE  
SN74AHCT374 . . . DB, DGV, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54AHCT374 . . . FK PACKAGE  
(TOP VIEW)  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
8Q  
8D  
1
2
3
4
5
6
7
8
9
20  
19  
18  
3
2
1
20 19  
18  
8D  
7D  
7Q  
2D  
2Q  
3Q  
3D  
4D  
4
5
6
7
8
17  
16  
17 7D  
16 7Q  
15 6Q  
14 6D  
13 5D  
12 5Q  
11 CLK  
15 6Q  
14  
9 10 11 12 13  
6D  
GND 10  
description/ordering information  
The ’AHCT374 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed  
specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable  
for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.  
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus  
lines without interface or pullup components.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube  
SN74AHCT374N  
SN74AHCT374N  
Tube  
SN74AHCT374DW  
SN74AHCT374DWR  
SN74AHCT374NSR  
SN74AHCT374DBR  
SN74AHCT374PW  
SN74AHCT374PWR  
SOIC – DW  
AHCT374  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP – NS  
AHCT374  
HB374  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
HB374  
Tape and reel  
Tape and reel  
Tube  
TVSOP – DGV  
CDIP – J  
SN74AHCT374DGVR HB374  
SNJ54AHCT374J  
SNJ54AHCT374W  
SNJ54AHCT374FK  
SNJ54AHCT374J  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHCT374W  
SNJ54AHCT374FK  
LCCC – FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...19

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