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SN74AHC245MDWREPG4 PDF预览

SN74AHC245MDWREPG4

更新时间： 2024-02-06 18:05:47
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
10页 450K
描述
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74AHC245MDWREPG4 数据手册

 浏览型号SN74AHC245MDWREPG4的Datasheet PDF文件第2页浏览型号SN74AHC245MDWREPG4的Datasheet PDF文件第3页浏览型号SN74AHC245MDWREPG4的Datasheet PDF文件第4页浏览型号SN74AHC245MDWREPG4的Datasheet PDF文件第5页浏览型号SN74AHC245MDWREPG4的Datasheet PDF文件第6页浏览型号SN74AHC245MDWREPG4的Datasheet PDF文件第7页 
SN74AHC245-EP  
OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCLS487A – MAY 2003 – REVISED JUNE 2003  
DW OR PW PACKAGE  
(TOP VIEW)  
Controlled Baseline  
– One Assembly/Test Site, One Fabrication  
Site  
DIR  
A1  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
CC  
Extended Temperature Performance of  
–55°C to 125°C  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A2  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
A3  
A4  
Enhanced Product-Change Notification  
A5  
†
A6  
Qualification Pedigree  
A7  
Operating Range 2-V to 5.5-V V  
CC  
A8  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
GND  
ESD Protection Exceeds 1000 V Per  
MIL-STD-833, Method 3015; Exceeds 100 V  
Using Machine Model (C = 200 pF, R = 0)  
†
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
description/ordering information  
The SN74AHC245 octal bus transceiver is designed for asynchronous two-way communication between data  
buses. The control-function implementation minimizes external timing requirements.  
This device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on  
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the  
device so that the buses effectively are isolated.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
SOIC – DW  
Tape and reel  
SN74AHC245MDWREP  
SN74AHC245MPWREP  
AHC245MEP  
AHC245EP  
–55°C to 125°C  
TSSOP – PW Tape and reel  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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