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SN74AHC139NSRG4 PDF预览

SN74AHC139NSRG4

更新时间： 2024-11-20 15:52:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
21页 1129K
描述
Dual 2-Line To 4-Line Decoders / Demultiplexers 16-SO -40 to 125

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SN74AHC139NSRG4 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP16,.3针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.31
Is Samacsys：N系列：AHC/VHC/H/U/V
输入调节：STANDARDJESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：10.2 mm
负载电容（CL）：50 pF逻辑集成电路类型：OTHER DECODER/DRIVER
最大I（ol）：0.008 A湿度敏感等级：1
功能数量：2端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：2/5.5 VProp。Delay @ Nom-Sup：10.5 ns
传播延迟（tpd）：16.5 ns认证状态：Not Qualified
座面最大高度：2 mm子类别：Decoder/Drivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5.3 mm
Base Number Matches：1

SN74AHC139NSRG4 数据手册

 浏览型号SN74AHC139NSRG4的Datasheet PDF文件第2页浏览型号SN74AHC139NSRG4的Datasheet PDF文件第3页浏览型号SN74AHC139NSRG4的Datasheet PDF文件第4页浏览型号SN74AHC139NSRG4的Datasheet PDF文件第5页浏览型号SN74AHC139NSRG4的Datasheet PDF文件第6页浏览型号SN74AHC139NSRG4的Datasheet PDF文件第7页 
SN74AHC139  
SN54AHC139  
www.ti.com  
SCLS259L –DECEMBER 1995–REVISED JUNE 2013  
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS  
Check for Samples: SN74AHC139, SN54AHC139  
1
FEATURES  
•
Operating Range 2-V to 5.5-V  
•
ESD Protection Exceeds JESD 22  
•
Designed Specifically for High-Speed Memory  
Decoders and Data-Transmission Systems  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
•
•
Incorporate Two Enable Inputs to Simplify  
Cascading and/or Data Reception  
1000-V Charged-Device Model (C101)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
SN54AHC139 . . . J or W PACKAGE  
SN74AHC139 . . . D,DB,DGV,N,NS  
OR PW PACKAGE  
SN74AHC139 . . . RGY PACKAGE  
(TOP VIEW)  
SN54AHC139 . . . FKP ACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
16  
1G  
1A  
VCC  
15 2G  
1
2
3
4
5
6
7
8
16  
3
2
1 20 19  
18  
2A  
17 2B  
1B  
1Y0  
NC  
4
5
6
7
8
15  
14  
13  
12  
11  
2
3
4
5
6
7
1A  
1B  
2G  
2A  
14  
13  
12  
11  
10  
9
1B  
2A  
16  
NC  
1Y0  
1Y1  
1Y2  
1Y3  
2B  
1Y0  
1Y1  
1Y2  
1Y3  
GND  
2B  
15  
14  
2Y0  
2Y1  
1Y1  
1Y2  
2Y0  
2Y1  
2Y2  
2Y0  
2Y1  
2Y2  
2Y3  
9 10 11 12 13  
10  
8
9
NC − No internal connection  
DESCRIPTION  
The ’AHC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation.  
These devices are designed to be used in high-performance memory-decoding or data-routing applications  
requiring very short propagation delay times. In high-performance memory systems, these decoders can be used  
to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit,  
the delay times of these decoders and the enable time of the memory usually are less than the typical access  
time of the memory. This means that the effective system delay introduced by the decoders is negligible.  
FUNCTION TABLE  
(EACH GATE)  
INPUTS  
OUTPUT  
SELECT  
G
Y0 Y1 Y2 Y3  
B
X
L
A
X
L
H
L
L
L
L
H
L
H
H
L
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1995–2013, Texas Instruments Incorporated  
 
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