SN65HVD72
SN65HVD75
SN65HVD78
SLLSE11C –MARCH 2012–REVISED SEPTEMBER 2013
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SWITCHING CHARACTERISTICS
50 Mbps device (HVD78) bit time ≥ 20 ns (over recommended operating conditions)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
DRIVER
Driver differential output rise/fall
time
1
3
6
ns
tr, tf
RL = 54 Ω, CL = 50 pF See Figure 3
tPHL, tPLH
tSK(P)
Driver propagation delay
9
0
15
1
ns
ns
ns
ns
µs
Driver pulse skew, |tPHL – tPLH
|
tPHZ, tPLZ
Driver disable time
10
10
30
30
8
See Figure 4 and
Receiver enabled
Receiver disabled
Figure 5
tPZH, tPZL
Driver enable time
RECEIVER
tr, tf
Receiver output rise/fall time
1
3
6
35
2.5
30
30
8
ns
ns
ns
ns
ns
µs
tPHL, tPLH
tSK(P)
Receiver propagation delay time
Receiver pulse skew, |tPHL – tPLH
Receiver disable time
CL = 15 pF
See Figure 6
|
tPLZ, tPHZ
8
10
3
Driver enabled
Driver disabled
See Figure 7
See Figure 8
tpZL(1), tPZH(1)
tPZL(2), tPZH(2)
Receiver enable time
PARAMETER MEASUREMENT INFORMATION
Input generator rate is 100 kbps, 50% duty cycle, rise and fall times less than 6 nsec, output impedance 50 Ω.
375 W ±1%
VCC
DE
A
B
D
VOD
0 V or 3 V
60 W ±1%
+
_
–7 V < V(test) < 12 V
375 W ±1%
S0301-01
Figure 1. Measurement of Driver Differential Output Voltage with Common-Mode Load
VA
A
B
RL/2
RL/2
A
B
VB
D
VOD
0 V or 3 V
VOC(PP)
DVOC(SS)
VOC
CL
VOC
S0302-01
Figure 2. Measurement of Driver Differential and Common-Mode output with RS-485 Load
6
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