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SN54LS161AJ PDF预览

SN54LS161AJ

更新时间: 2024-11-09 20:18:31
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 逻辑集成电路
页数 文件大小 规格书
6页 156K
描述
Binary Counter, LS Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, TTL, CDIP16, CERAMIC, DIP-16

SN54LS161AJ 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.32
Is Samacsys:N其他特性:TCO OUTPUT
计数方向:UP系列:LS
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.3 mm负载电容(CL):15 pF
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
工作模式:SYNCHRONOUS位数:4
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):32 mA
传播延迟(tpd):27 ns认证状态:Not Qualified
座面最大高度:4.19 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:25 MHzBase Number Matches:1

SN54LS161AJ 数据手册

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SN54/74LS160A  
SN54/74LS161A  
SN54/74LS162A  
SN54/74LS163A  
BCD DECADE COUNTERS/  
4-BIT BINARY COUNTERS  
The LS160A/161A/162A/163A are high-speed 4-bit synchronous count-  
ers. They are edge-triggered, synchronously presettable, and cascadable  
MSI building blocks for counting, memory addressing, frequency division and  
other applications. The LS160A and LS162A count modulo 10 (BCD). The  
LS161A and LS163A count modulo 16 (binary.)  
BCD DECADE COUNTERS/  
4-BIT BINARY COUNTERS  
The LS160A and LS161A have an asynchronous Master Reset (Clear)  
input that overrides, and is independent of, the clock and all other control  
inputs.TheLS162AandLS163AhaveaSynchronousReset(Clear)inputthat  
overrides all other control inputs, but is active only during the rising clock  
edge.  
LOW POWER SCHOTTKY  
BCD (Modulo 10)  
LS160A  
Binary (Modulo 16)  
LS161A  
J SUFFIX  
CERAMIC  
CASE 620-09  
Asynchronous Reset  
Synchronous Reset  
LS162A  
LS163A  
16  
1
Synchronous Counting and Loading  
Two Count Enable Inputs for High Speed Synchronous Expansion  
Terminal Count Fully Decoded  
Edge-Triggered Operation  
Typical Count Rate of 35 MHz  
ESD > 3500 Volts  
N SUFFIX  
PLASTIC  
CASE 648-08  
16  
1
CONNECTION DIAGRAM DIP (TOP VIEW)  
D SUFFIX  
SOIC  
CASE 751B-03  
NOTE:  
16  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
1
ORDERING INFORMATION  
*MR for LS160A and LS161A  
*SR for LS162A and LS163A  
SN54LSXXXJ Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
PIN NAMES  
LOADING (Note a)  
LOGIC SYMBOL  
HIGH  
LOW  
PE  
Parallel Enable (Active LOW) Input  
Parallel Inputs  
Count Enable Parallel Input  
Count Enable Trickle Input  
Clock (Active HIGH Going Edge) Input  
Master Reset (Active LOW) Input  
Synchronous Reset (Active LOW) Input  
Parallel Outputs (Note b)  
1.0 U.L.  
0.5 U.L.  
0.5 U.L.  
1.0 U.L.  
0.5 U.L.  
0.5 U.L.  
1.0 U.L.  
10 U.L.  
10 U.L.  
0.5 U.L.  
0.25 U.L.  
0.25 U.L.  
0.5 U.L.  
0.25 U.L.  
0.25 U.L.  
0.5 U.L.  
P P  
0
3
CEP  
CET  
CP  
MR  
SR  
Q Q  
5 (2.5) U.L.  
5 (2.5) U.L.  
0
3
TC  
Terminal Count Output (Note b)  
NOTES:  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
Temperature Ranges.  
*MR for LS160A and LS161A  
*SR for LS162A and LS163A  
FAST AND LS TTL DATA  
5-278  

SN54LS161AJ 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS163AN TI

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