ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢈ ꢉ ꢀꢁꢊ ꢃꢄ ꢅꢆ ꢇꢈ
ꢋꢌꢍ ꢎ ꢏ ꢐꢎ ꢑꢁꢒ ꢓ ꢔ ꢃ ꢐꢎ ꢑꢁꢒ ꢋꢒꢅ ꢔꢋ ꢒꢕꢀ ꢖ ꢋꢒ ꢗꢌꢎꢓꢑ ꢘ ꢎꢒ ꢙꢒ ꢕ ꢀ
SCLS108D − DECEMBER 1982 − REVISED SEPTEMBER 2003
SN54HC139 . . . J OR W PACKAGE
SN74HC139 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
D
Targeted Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
Low Power Consumption, 80-µA Max I
CC
Typical t = 10 ns
pd
4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
SN54HC139 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The ’HC139 devices are designed for
high-performance
memory-decoding
or
data-routing applications requiring very short
propagation delay times. In high-performance
memory systems, these decoders can minimize
the effects of system decoding. When employed
with high-speed memories utilizing a fast enable
circuit, the delay time of these decoders and the
enable time of the memory usually are less than
the typical access time of the memory. This means
that the effective system delay introduced by the
decoders is negligible.
3
2
1
20 19
18
2A
2B
NC
1B
1Y0
NC
4
5
6
7
8
17
16
15 2Y0
14
9 10 11 12 13
1Y1
1Y2
2Y1
NC − No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
†
T
A
PACKAGE
PDIP − N
PACKAGE
Tube of 25
Tube of 40
SN74HC139N
SN74HC139N
SN74HC139D
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
SN74HC139DR
SN74HC139DT
SN74HC139NSR
SN74HC139DBR
SN74HC139PW
SN74HC139PWR
SN74HC139PWT
SNJ54HC139J
SOIC − D
HC139
SOP − NS
HC139
HC139
−40°C to 85°C
SSOP − DB
Reel of 2000
Reel of 250
Tube of 25
TSSOP − PW
HC139
CDIP − J
CFP − W
LCCC − FK
SNJ54HC139J
SNJ54HC139W
SNJ54HC139FK
Tube of 150
Tube of 55
SNJ54HC139W
SNJ54HC139FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ꢘ
ꢘ
ꢕ
ꢔ
ꢩ
ꢋ
ꢤ
ꢠ
ꢌ
ꢅ
ꢢ
ꢓ
ꢣ
ꢭ
ꢑ
ꢝ
ꢔ
ꢛ
ꢞ
ꢁ
ꢜ
ꢋ
ꢍ
ꢓ
ꢍ
ꢚ
ꢛ
ꢥ
ꢤ
ꢜ
ꢝ
ꢣ
ꢣ
ꢞ
ꢟ
ꢠ
ꢠ
ꢛ
ꢡ
ꢡ
ꢚ
ꢚ
ꢦ
ꢝ
ꢝ
ꢞ
ꢛ
ꢛ
ꢝ
ꢚ
ꢢ
ꢢ
ꢦ
ꢢ
ꢣ
ꢤ
ꢞ
ꢞ
ꢥ
ꢥ
ꢛ
ꢡ
ꢠ
ꢟ
ꢢ
ꢢ
ꢢ
ꢛ
ꢝ
ꢜ
ꢦ
ꢤ
ꢧ
ꢢ
ꢢ
ꢨ
ꢚ
ꢣ
ꢠ
ꢢ
ꢡ
ꢚ
ꢡ
ꢮ
ꢝ
ꢞ
ꢛ
ꢤ
ꢩ
ꢠ
ꢛ
ꢩ
ꢡ
ꢡ
ꢥ
ꢢ
ꢥ
ꢪ
Copyright 2003, Texas Instruments Incorporated
ꢔ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢗꢑ ꢎꢐ ꢘꢕ ꢰ ꢐꢇꢱꢂ ꢇꢂꢉ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ
ꢞ
ꢝ
ꢣ
ꢡ
ꢝ
ꢞ
ꢟ
ꢡ
ꢝ
ꢢ
ꢦ
ꢚ
ꢜ
ꢚ
ꢣ
ꢥ
ꢞ
ꢡ
ꢫ
ꢡ
ꢥ
ꢞ
ꢝ
ꢜ
ꢓ
ꢥ
ꢬ
ꢠ
ꢑ
ꢛ
ꢟ
ꢥ
ꢢ
ꢡ
ꢠ
ꢛ
ꢩ
ꢞ
ꢩ
ꢠ
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ
ꢞ
ꢠ
ꢛ
ꢡ
ꢮ
ꢪ
ꢘ
ꢞ
ꢝ
ꢩ
ꢡ
ꢚ
ꢝ
ꢣ
ꢥ
ꢢ
ꢚ
ꢛ
ꢯ
ꢩ
ꢝ
ꢥ
ꢝ
ꢡ
ꢛ
ꢥ
ꢣ
ꢥ
ꢢ
ꢠ
ꢞ
ꢚ
ꢨ
ꢚ
ꢛ
ꢣ
ꢨ
ꢤ
ꢤ ꢛꢨ ꢥꢢꢢ ꢝ ꢡꢫꢥ ꢞ ꢭꢚ ꢢꢥ ꢛ ꢝꢡꢥ ꢩꢪ ꢔ ꢛ ꢠꢨ ꢨ ꢝ ꢡꢫꢥ ꢞ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢢ ꢉ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢚꢝ ꢛ
ꢯ
ꢦ
ꢞ
ꢝ
ꢣ
ꢥ
ꢢ
ꢢ
ꢚ
ꢛ
ꢯ
ꢩ
ꢝ
ꢥ
ꢢ
ꢛ
ꢝ
ꢡ
ꢛ
ꢥ
ꢣ
ꢥ
ꢢ
ꢢ
ꢠ
ꢞ
ꢚ
ꢨ
ꢮ
ꢚ
ꢛ
ꢣ
ꢨ
ꢤ
ꢩ
ꢥ
ꢡ
ꢥ
ꢢ
ꢡ
ꢚ
ꢛ
ꢝ
ꢜ
ꢠ
ꢨ
ꢨ
ꢦ
ꢠ
ꢞ
ꢠ
ꢟ
ꢥ
ꢡ
ꢥ
ꢞ
ꢢ
ꢪ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265