Datasheet > SN54ALS323

SN54ALS323

更新时间： 2024-09-29 23:06:11

品牌	Logo	应用领域
德州仪器 - TI		存储输出元件
页数	文件大小	规格书
7页	121K
描述
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS

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SN54ALS323 数据手册

SN54ALS323, SN74ALS323

8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS

WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS

SDAS267A – DECEMBER 1982 – REVISED DECEMBER 1994

SN54ALS323 . . . J PACKAGE

SN74ALS323 . . . DW OR N PACKAGE

(TOP VIEW)

• Multiplexed I/O Ports Provide Improved Bit

Density

• Four Modes of Operation:

– Hold (Store)

OE1

OE2

– Shift Right

– Shift Left

– Load Data

G/Q

H′

• Operate With Outputs Enabled or at High

E/Q

H/Q

Impedance

C/Q

F/Q

• 3-State Outputs Drive Bus Lines Directly

• Can Be Cascaded for n-Bit Word Lengths

• Synchronous Clear

A/Q

D/Q

B/Q

A′

CLR

GND

CLK

• Applications:

– Stacked or Push-Down Registers

– Buffer Storage

SN54ALS323 . . . FK PACKAGE

(TOP VIEW)

– Accumulator Registers

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic (N)

and Ceramic (J) 300-mil DIPs

20 19

G/Q

E/Q

H′

description

C/Q

A/Q

H/Q

F/Q

These 8-bit universal shift/storage registers

feature multiplexed input/output (I/O) ports to

achieve full 8-bit data handling in a 20-pin

package. Two function-select (S0, S1) inputs and

two output-enable (OE1, OE2) inputs can be used

to choose the modes of operation listed in the

function table.

D/Q

A′

9 10 11 12 13

Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs

in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading

out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs

synchronously when the clear (CLR) input is low. Taking either OE1 or OE2 high disables the outputs but has

no effect on clearing, shifting, or storing data.

The SN54ALS323 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ALS323 is characterized for operation from 0°C to 70°C.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7

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SN54ALS323 替代型号

型号	品牌	替代类型	描述	数据表
SN74ALS323	TI	功能相似	8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS

与SN54ALS323相关器件

型号	品牌	获取价格	描述	数据表
SN54ALS323FH	TI	获取价格	IC,SHIFT REGISTER,ALS-TTL,LLCC,20PIN,CERAMIC
SN54ALS323FK	TI	获取价格	8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS
SN54ALS323J	TI	获取价格	8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS
SN54ALS323J-00	TI	获取价格	ALS SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP
SN54ALS32FH	ROCHESTER	获取价格	OR Gate
SN54ALS32FH	TI	获取价格	IC,LOGIC GATE,QUAD 2-INPUT OR,ALS-TTL,LLCC,20PIN,CERAMIC
SN54ALS32FK	TI	获取价格	QUADRUPLE 2-INPUT POSITIVE-OR GATES
SN54ALS32J	TI	获取价格	QUADRUPLE 2-INPUT POSITIVE-OR GATES
SN54ALS32J-00	TI	获取价格	ALS SERIES, QUAD 2-INPUT OR GATE, CDIP14
SN54ALS32W	TI	获取价格	IC,LOGIC GATE,QUAD 2-INPUT OR,ALS-TTL,FP,14PIN,CERAMIC

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