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SN54AHCT14FKR PDF预览

SN54AHCT14FKR

更新时间: 2024-11-25 20:11:35
品牌 Logo 应用领域
德州仪器 - TI 输入元件逻辑集成电路
页数 文件大小 规格书
25页 1397K
描述
AHCT/VHCT SERIES, HEX 1-INPUT INVERT GATE, CQCC20

SN54AHCT14FKR 技术参数

生命周期:Obsolete包装说明:QCCN,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.44系列:AHCT/VHCT
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
功能数量:6输入次数:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:2.03 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD宽度:8.89 mm
Base Number Matches:1

SN54AHCT14FKR 数据手册

 浏览型号SN54AHCT14FKR的Datasheet PDF文件第2页浏览型号SN54AHCT14FKR的Datasheet PDF文件第3页浏览型号SN54AHCT14FKR的Datasheet PDF文件第4页浏览型号SN54AHCT14FKR的Datasheet PDF文件第5页浏览型号SN54AHCT14FKR的Datasheet PDF文件第6页浏览型号SN54AHCT14FKR的Datasheet PDF文件第7页 
SN54AHCT14, SN74AHCT14  
HEX SCHMITT-TRIGGER INVERTERS  
SCLS246P − OCTOBER 1995 − REVISED JULY 2003  
D
D
Inputs Are TTL-Voltage Compatible  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
− 1000-V Charged-Device Model (C101)  
SN54AHCT14 . . . FK PACKAGE  
SN54AHCT14 . . . J OR W PACKAGE  
SN74AHCT14 . . . D, DB, DGV, N, NS,  
OR PW PACKAGE  
SN74AHCT14 . . . RGY PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
(TOP VIEW)  
1A  
1Y  
2A  
2Y  
3A  
VCC  
13 6A  
1
2
3
4
5
6
7
14  
3
2
1 20 19  
18  
1
14  
6Y  
NC  
5A  
2A  
NC  
2Y  
NC  
3A  
4
5
6
7
8
1Y  
2A  
2Y  
3A  
3Y  
13 6A  
12 6Y  
2
3
4
5
6
17  
16  
12  
11  
10  
9
6Y  
5A  
5Y  
4A  
4Y  
11  
10  
9
5A  
5Y  
4A  
15 NC  
14  
9 10 11 12 13  
5Y  
3Y  
GND  
8
7
8
NC − No internal connection  
description/ordering information  
The ’AHCT14 devices contain six independent inverters. These devices perform the Boolean function Y = A.  
Each circuit functions as an independent inverter, but because of the Schmitt action, the inverters have different  
input threshold levels for positive-going (V ) and for negative-going (V ) signals.  
T+  
T−  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
PART NUMBER  
SN74AHCT14RGYR  
SN74AHCT14N  
QFN − RGY  
PDIP − N  
Tape and reel  
Tube  
HB14  
SN74AHCT14N  
Tube  
SN74AHCT14D  
SOIC − D  
AHCT14  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AHCT14DR  
SN74AHCT14NSR  
SN74AHCT14DBR  
SN74AHCT14PW  
SN74AHCT14PWR  
SN74AHCT14DGVR  
SNJ54AHCT14J  
−40°C to 85°C  
SOP − NS  
AHCT14  
HB14  
SSOP − DB  
TSSOP − PW  
HB14  
Tape and reel  
Tape and reel  
Tube  
TVSOP − DGV  
CDIP − J  
HB14  
SNJ54AHCT14J  
SNJ54AHCT14W  
SNJ54AHCT14FK  
CFP − W  
Tube  
SNJ54AHCT14W  
SNJ54AHCT14FK  
−55°C to 125°C  
LCCC − FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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