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SN0401093

更新时间： 2024-11-15 03:31:35
品牌 Logo 应用领域
德州仪器 - TI 输出元件输入元件
页数 文件大小 规格书
13页 223K
描述
DUAL INPUT BUS 9-A OUTPUT SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs(SWIFT)

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中文翻译

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SN0401093 数据手册

 浏览型号SN0401093的Datasheet PDF文件第2页浏览型号SN0401093的Datasheet PDF文件第3页浏览型号SN0401093的Datasheet PDF文件第4页浏览型号SN0401093的Datasheet PDF文件第5页浏览型号SN0401093的Datasheet PDF文件第6页浏览型号SN0401093的Datasheet PDF文件第7页 
Typical Size  
6,4 mm X 9,7 mm  
www.ti.com  
ꢀꢁ ꢂꢃ ꢂꢄ ꢂꢅ ꢆ  
SLVS523− OCTOBER 2004  
ꢇ ꢈ ꢉ ꢊ ꢋꢁ ꢌꢈ ꢍ ꢎ ꢈ ꢀ ꢅ ꢏ ꢉ ꢐ ꢈꢍꢌ ꢈꢍ ꢀ ꢑꢁ ꢒꢓ ꢔꢐ ꢁꢐ ꢈꢀ ꢎ ꢈꢒꢕ ꢌ ꢖꢗ  
ꢚ
ꢀ
ꢖ
ꢋ
ꢍ
ꢒꢓ  
ꢘꢔ  
ꢖ
ꢋ
ꢍ
ꢓ
ꢋ
ꢁ
ꢍ
ꢘ
ꢙ
ꢔ
ꢉ
ꢍ
ꢘ
ꢇ
ꢘ
ꢍ
ꢛ
ꢜ
ꢀ
ꢖ
ꢋ
ꢚ
ꢍ
ꢝ
FEATURES  
DESCRIPTION  
D
Low Voltage Separate Power Bus  
15-mΩ MOSFET Switches for High Efficiency  
at 9-A Continuous Output  
Adjustable Output Voltage  
Externally Compensated With 1% Internal  
Reference Accuracy  
Fast Transient Response  
Wide PWM Frequency:  
Adjustable 280 kHz to 700 kHz  
Load Protected at Thermal Shutdown  
Integrated Solution Reduces Board Area and  
Total Cost  
As a member of the SWIFTfamily of dc/dc regulators,  
the SN0401093 low-input voltage high-output current  
synchronous buck PWM converter integrates all  
required active components. Included on the substrate  
with the listed features are a true, high performance,  
voltage error amplifier that enables maximum  
performance under transient conditions and flexibility in  
choosing the output filter L and C components; an  
under-voltage-lockout circuit to prevent start-up until  
the VIN input voltage reaches 3 V; an internally and  
externally set slow-start circuit to limit in-rush currents;  
and a power good output useful for processor/logic  
reset, fault signaling, and supply sequencing.  
D
D
D
D
D
D
D
APPLICATIONS  
The SN0401093 is available in a thermally enhanced  
28-pin TSSOP (PWP) PowerPADpackage, which  
eliminates bulky heatsinks.  
D
D
Low-Voltage, High-Density Systems With  
Power Distribution at 1.0 V  
Point of Load Regulation for High  
Performance DSPs, FPGAs, ASICs and  
Microprocessors  
D
Broadband, Networking and Optical  
Communications Infrastructure  
SIMPLIFIED SCHEMATIC  
EFFICIENCY  
vs  
OUTPUT CURRENT  
SIMPLIFIED SCHEMATIC  
100  
Input1  
Input2  
PVIN  
PH  
Output  
95  
SN0401093  
90  
85  
BOOT  
PGND  
3.3 V  
80  
75  
70  
VIN  
COMP  
VBIAS  
VSENSE  
AGND  
65  
60  
VIN = 3.3 V,  
PVIN = 2.5 V,  
V
= 1.8 V,  
Compensation  
Network  
O
55  
50  
f = 700 kHz  
s
0
1
2
3
4
5
6
7
8
9
10  
I
− Output Current − A  
O
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD and SWIFT are trademarks of Texas Instruments.  
ꢌꢔ ꢐ ꢇꢈ ꢒ ꢍꢋ ꢐꢁ ꢇ ꢉꢍꢉ ꢞꢟ ꢠꢡ ꢢ ꢣꢤ ꢥꢞꢡꢟ ꢞꢛ ꢦꢧ ꢢ ꢢ ꢨꢟꢥ ꢤꢛ ꢡꢠ ꢩꢧꢪ ꢫꢞꢦ ꢤꢥꢞ ꢡꢟ ꢬꢤ ꢥꢨꢭ ꢌꢢ ꢡꢬꢧ ꢦꢥꢛ  
ꢦ ꢡꢟ ꢠꢡꢢ ꢣ ꢥꢡ ꢛ ꢩꢨ ꢦ ꢞ ꢠꢞ ꢦ ꢤ ꢥꢞ ꢡꢟꢛ ꢩ ꢨꢢ ꢥꢮꢨ ꢥꢨ ꢢ ꢣꢛ ꢡꢠ ꢍꢨꢯ ꢤꢛ ꢋꢟꢛ ꢥꢢ ꢧꢣ ꢨꢟꢥ ꢛ ꢛꢥ ꢤꢟꢬ ꢤꢢ ꢬ ꢰ ꢤꢢ ꢢ ꢤ ꢟꢥꢱꢭ  
ꢌꢢ ꢡ ꢬꢧꢦ ꢥ ꢞꢡ ꢟ ꢩꢢ ꢡ ꢦ ꢨ ꢛ ꢛ ꢞꢟ ꢲ ꢬꢡ ꢨ ꢛ ꢟꢡꢥ ꢟꢨ ꢦꢨ ꢛꢛ ꢤꢢ ꢞꢫ ꢱ ꢞꢟꢦ ꢫꢧꢬ ꢨ ꢥꢨ ꢛꢥꢞ ꢟꢲ ꢡꢠ ꢤꢫ ꢫ ꢩꢤ ꢢ ꢤꢣ ꢨꢥꢨ ꢢ ꢛꢭ  
Copyright 2004, Texas Instruments Incorporated  
1234567...13

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