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SM803020UMY PDF预览

SM803020UMY

更新时间: 2024-11-21 12:03:59
品牌 Logo 应用领域
麦瑞 - MICREL 晶体外围集成电路时钟
页数 文件大小 规格书
14页 941K
描述
Flexible Ultra-Low Jitter Clock Synthesizer

SM803020UMY 数据手册

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SM803020  
Flexible Ultra-Low Jitter Clock Synthesizer  
General Description  
Features  
The SM803020 is a dual-PLL clock generator that  
achieves ultra-low, 74.2fs_rms output jitter at 156.25MHz  
output frequency. It accepts a crystal input or a reference  
input.  
Generates twelve 156.25MHz outputs  
Independently programmable output logic:  
Output logic: LVPECL (default), LVDS, HCSL,  
LVCMOS  
Each output channel is individually configurable to a  
differential PECL, LVDS, HCSL, or CMOS output logic  
level. PECL is selected by default, but can be overridden  
through SPI. It is packaged in a dual-row 84-pin  
7mm x 7mm package.  
74.2fs jitter at 156.25MHz (1.875MHz to 20MHz)  
Selectable inputs require 39.0625MHz input frequency  
XTAL (default)  
Differential or single-ended reference clock (SPI  
selectable)  
Datasheets and support documentation are available on  
Micrel’s web site at: www.micrel.com.  
2.5V or 3.3V operating power supply  
Separate output power supplies:  
Different banks can be at different levels  
Industrial temperature range (–40°C to +85°C)  
Green, RoHS, and PFOS compliant  
Typical Application  
Available in 84-pin 7mm × 7mm QFN package  
Applications  
1/10/40/100 Gigabit Ethernet  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com  
Revision 1.0  
hbwhelp@micrel.com or (408) 955-1690  
July 22, 2013  

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