Datasheet > SM0-65609EV-70

SM0-65609EV-70

更新时间： 2023-01-15 00:00:00

品牌	Logo	应用领域
TEMIC		静态存储器
页数	文件大小	规格书
9页	135K
描述
Standard SRAM, 128KX8, 70ns, CMOS,

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数据手册

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SM0-65609EV-70 数据手册

M65609E

128 K ꢀ 8 Very Low Power CMOS SRAM Rad Tolerant

Introduction

The M65609E is a very low power CMOS static RAM

organized as 131072 × 8 bits.

access time at 35 ns over the full military temperature

range. The high stability of the 6T cell provides

excellent protection against soft errors due to noise.

TEMIC brings the solution to applications where fast

computing is as mandatory as low consumption, such as

aerospace electronics, portable instruments, or

embarked systems.

The M65609E is processed according to the methods of

the latest revision of the MIL STD 883 (class B or S),

ESA SCC 9000 or QML.

Utilizing an array of six transistors (6T) memory cells,

the M65609E combines an extremely low standby

supply current (Typical value = 0.2 µA) with a fast

It is produced on the same process as the MH1RT sea of

gates series.

Features

D Operating voltage: 3.3 V

D Access time: 35, 70 ns

D TTL compatible inputs and outputs

D Asynchronous

D Very low power consumption

active : 200 mW (Max)

D Designed on 0.35 micron process

D Latch up immune

standby : 300 µW (Typ)

D 200 Krads capability

D Wide temperature Range : –55 To +125°C

D SEU LET better than 3 MeV

D 400 Mils width package

Interface

Block Diagram

Rev. A – June 5, 2000

Preliminary

12 3 4 5 6 7...9

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