Si5345/44/42 Rev D Data Sheet
10-Channel, Any-Frequency, Any-Output Jitter Attenuator/
Clock Multiplier
KEY FEATURES
• Generates any combination of output
frequencies from any input frequency
These jitter attenuating clock multipliers combine fourth-generation DSPLL™ and
MultiSynth™ technologies to enable any-frequency clock generation and jitter attenu-
ation for applications requiring the highest level of jitter performance. These devices
are programmable via a serial interface with in-circuit programmable non-volatile
memory (NVM) so they always power up with a known frequency configuration. They
support free-run, synchronous, and holdover modes of operation, and offer both au-
tomatic and manual input clock switching. The loop filter is fully integrated on-chip,
eliminating the risk of noise coupling associated with discrete solutions. Furthermore,
the jitter attenuation bandwidth is digitally programmable, providing jitter perform-
ance optimization at the application level. Programming the Si5345/44/42 is easy
• Ultra-low jitter of 90 fs rms
• External Crystal: 25 to 54 MHz
• Input frequency range
• Differential: 8 kHz to 750 MHz
• LVCMOS: 8 kHz to 250 MHz
• Output frequency range
• Differential: 100 Hz to 1028 MHz
• LVCMOS: 100 Hz to 250 MHz
with Silicon Labs’ ClockBuilder Pro™ software. Factory preprogrammed devices are
also available.
• Meets G.8262 EEC Option 1, 2 (SyncE)
• Highly configurable outputs compatible with
LVDS, LVPECL, LVCMOS, CML, and HCSL
with programmable signal amplitude
Applications:
• Si5345: 4 input, 10 output, 64-QFN 9×9 mm
• Si5344: 4 input, 4 output, 44-QFN 7×7 mm
• Si5342: 4 input, 2 output, 44-QFN 7×7 mm
• OTN muxponders and transponders
• 10/40/100 G networking line cards
• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)
• Carrier Ethernet switches
• SONET/SDH line cards
• Broadcast video
• Test and measurement
• ITU-T G.8262 (SyncE) compliant
25-54 MHz XTAL
XA
XB
OSC
÷INT
MultiSynth
MultiSynth
MultiSynth
MultiSynth
MultiSynth
÷INT
OUT0
OUT1
OUT2
÷INT
÷INT
÷INT
÷INT
IN0
IN1
IN2
÷INT
÷INT
÷INT
DSPLL
OUT3
4 Input
Clocks
Up to 10
Output Clocks
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
÷INT
÷INT
÷INT
÷INT
÷INT
IN3/FB_IN
Status Flags
I2C / SPI
Status Monitor
Control
NVM
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Rev. 1.0