Datasheet > 微控制器和处理器 > 时钟发生器> SI5341A-D09114-GM

SI5341A-D09114-GM

更新时间： 2024-11-19 05:50:27

品牌	Logo	应用领域
芯科 - SILICON		时钟控制器微控制器微控制器和处理器时钟发生器
页数	文件大小	规格书
53页	5459K
描述
Processor Specific Clock Generator,

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SI5341A-D09114-GM 数据手册

浏览型号SI5341A-D09114-GM的Datasheet PDF文件第2页

浏览型号SI5341A-D09114-GM的Datasheet PDF文件第3页

浏览型号SI5341A-D09114-GM的Datasheet PDF文件第4页

浏览型号SI5341A-D09114-GM的Datasheet PDF文件第5页

浏览型号SI5341A-D09114-GM的Datasheet PDF文件第6页

浏览型号SI5341A-D09114-GM的Datasheet PDF文件第7页

Si5341/40 Rev D Data Sheet

Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock

Generator

KEY FEATURES

• Generates any combination of output

frequencies from any input frequency

The any-frequency, any-output Si5341/40 clock generators combine a wide-band PLL

with proprietary MultiSynth^™fractional synthesizer technology to offer a versatile and

high performance clock generator platform. This highly flexible architecture is capable

of synthesizing a wide range of integer and non-integer related frequencies up to 1

GHz on 10 differential clock outputs while delivering sub-100 fs rms phase jitter per-

formance with 0 ppm error. Each of the clock outputs can be assigned its own format

and output voltage enabling the Si5341/40 to replace multiple clock ICs and oscillators

with a single device making it a true "clock tree on a chip."

• Ultra-low jitter of 90 fs rms

• Input frequency range:

• External crystal: 25 to 54 MHz

• Differential clock: 10 to 750 MHz

• LVCMOS clock: 10 to 250 MHz

• Output frequency range:

• Differential: 100 Hz to 1028 MHz

The Si5341/40 can be quickly and easily configured using ClockBuilderPro software.

• LVCMOS: 100 Hz to 250 MHz

Custom part numbers are automatically assigned using a ClockBuilder Pro^™for fast,

free, and easy factory pre-programming or the Si5341/40 can be programmed via I2C

and SPI serial interfaces.

• Highly configurable outputs compatible with

LVDS, LVPECL, LVCMOS, CML, and HCSL

with programmable signal amplitude

• Si5341: 4 input, 10 output, 64-QFN 9x9 mm

• Si5340: 4 input, 4 output, 44-QFN 7x7 mm

Applications:

• Clock tree generation replacing XOs, buffers, signal format translators

• Any-frequency clock translation

• Clocking for FPGAs, processors, memory

• Ethernet switches/routers

• OTN framers/mappers/processors

• Test equipment and instrumentation

• Broadcast video

25-54 MHz XTAL

4 Input

Clocks

OSC

÷INT

MultiSynth

÷INT

OUT0

OUT1

OUT2

OUT3

IN0

IN1

IN2

÷INT

PLL

OUT4

Up to 10

Output Clocks

OUT5

÷INT

Zero Delay

÷INT

OUT6

OUT7

OUT8

OUT9

FB_IN

Status Flags

I2C / SPI

Status Monitor

Control

NVM

silabs.com | Smart. Connected. Energy-friendly.

Rev. 1.0

12 3 4 5 6 7...53

中文翻译

下载PDF

与SI5341A-D09114-GM相关器件

型号	品牌	获取价格	描述	数据表
SI5341A-D10091-GM	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10110-GM	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10187-GMR	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10469-GM	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10814-GM	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10814-GMR	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10826-GM	SILICON	获取价格	Processor Specific Clock Generator,
SI5341A-D10826-GMR	SILICON	获取价格	Processor Specific Clock Generator,
Si5341A-D-GM	SILICON	获取价格	Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator
SI5341B-B03545-GM	SILICON	获取价格	Processor Specific Clock Generator,

与SI5341A-D09114-GM相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

17
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

12
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

42
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

36

产品中心

服务支持

精选活动

关于我们

帮助中心

SI5341A-D09114-GM

SI5341A-D09114-GM 数据手册

与SI5341A-D09114-GM相关器件

与SI5341A-D09114-GM相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SI5341A-D09114-GM

SI5341A-D09114-GM 数据手册

与SI5341A-D09114-GM相关器件

与SI5341A-D09114-GM相关文章

您还可以找

您在本页遇到什么问题？