Datasheet > SI52147

SI52147

更新时间： 2024-09-15 09:26:03

品牌	Logo	应用领域
芯科 - SILICON		时钟发生器输出元件 PC
页数	文件大小	规格书
22页	182K
描述
PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT CLOCK GENERATOR

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SI52147 数据手册

Si52147

PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT

CLOCK GENERATOR

Features

 PCI-Express Gen 1, Gen 2, &

 25 MHz crystal input or clock

Gen 3 compliant

input

 Low power push-pull type

 I C support with readback

differential output buffers

capabilities

 Integrated resistors on differential

 Triangular spread spectrum

profile for maximum

clocks

 Output enable pin for all clocks

electromagnetic interference

(EMI) reduction

 Hardware selectable spread

control

 Industrial temperature:

 Nine PCI-Express clocks

–40 to 85 C

Ordering Information:

 3.3 V power supply

 48-pin QFN package

See page 20.

Pin Assignments

Applications

 Network attached storage

 Multi-function printer

 Wireless access point

 Routers

DIFF8

VDD

Description

OE0¹

VDD

DIFF7

OE1¹

32 DIFF7

SSON²

VSS_PLL3

VSS_PLL4

OE2¹

The Si52147 is a spread-controlled PCIe clock generator that can source

nine PCIe clocks simultaneously. The device has six hardware output

enable control inputs for enabling the respective differential outputs on the

fly while powered on along with the hardware spread control for EMI

reduction.

DIFF6

GND

VDD

OE3¹

DIFF5

27 DIFF5

OE[4:5]¹10

DIFF4

OE[6:8]¹

VDD

Functional Block Diagram

Notes:

1. Internal 100 kohm pull-up.

2. Internal 100 kohm pull-down.

Patents pending

DIFF0

XIN/CLKIN

XOUT

DIFF1

DIFF2

DIFF3

PLL1

Divider

DIFF4

(SSC)

DIFF5

DIFF6

SCLK

Control & Memory

SDATA

DIFF7

CKPWRGD/PDB

Control

RAM

OE [8:0]

SSON

DIFF8

Preliminary Rev. 0.1 12/11

Si52147

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

12 3 4 5 6 7...22

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