Si3232
DUAL PROGRAMMABLE CMOS SLIC WITH LINE MONITORING
Features
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Ideal for customer premise applications ꢀ Automatic switching of up to three
battery supplies
On-hook transmission
Low standby power consumption:
<65 mW per channel
Internal balanced ringing to 65 Vrms
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Loop or ground start operation with
smooth/abrupt polarity reversal
SPI bus digital interface with
programmable interrupts
3.3 V operation
Software programmable parameters:
ꢁ Ringing frequency, amplitude,
cadence, and waveshape
ꢁ Two-wire ac impedance
ꢁ DC loop feed (18–45 mA)
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GR-909 loop diagnostics and
loopback testing
ꢁ Loop closure and ring trip thresholds
ꢁ Ground key detect threshold
Ordering Information
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12 kHz/16 kHz pulse metering
Lead-free/RoHS compatible
packages available
See page 122.
U.S. Patent #6,567,521
Applications
U.S. Patent #6,812,744
Other patents pending
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Cable telephony
Wireless local loop
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Voice over IP/voice over DSL
ISDN terminal adapters
Description
The Si3232 is a low-voltage CMOS SLIC that offers a low-cost, fully software-
programmable, dual-channel, analog telephone interface for customer premise
(CPE) applications. Internal ringing generation eliminates centralized ringers and
ringing relays, and on-chip subscriber loop testing allows remote line card and
loop diagnostics with no external test equipment or relays. The Si3232 performs
all programmable SLIC functions in compliance with all relevant LSSGR, ITU, and
ETSI specifications; all high-voltage functions are performed by the Si3200
linefeed interface IC. The Si3232 operates from a single 3.3 V supply and
interfaces to a standard SPI bus digital interface for control. The Si3200 operates
from a 3.3 V supply as well as high-voltage battery supplies up to 100 V. The
Si3232 is available in a 64-pin thin quad flat package (TQFP), and the Si3200 is
available in a thermally-enhanced 16-pin small-outline (SOIC) package.
Functional Block Diagram
INT RESET
Si3232
CS
SPI
TIP
SCLK
SDI
Si3200
Linefeed
Interface
Control
Interface
SDO
RING
VRXPa
VRXNa
VTXPa
VTXNa
VTXPb
VTXNb
VRXPb
TIP
Si3200
Linefeed
Interface
RING
VRXNb
VCM
PLL
PCLK
FSYNC
Preliminary Rev. 0.96 2/05
Copyright © 2005 by Silicon Laboratories
Si3232
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.