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SDU50N03L PDF预览

SDU50N03L

更新时间: 2024-11-30 03:30:51
品牌 Logo 应用领域
三合微科 - SAMHOP 晶体晶体管功率场效应晶体管
页数 文件大小 规格书
8页 870K
描述
N-Channel Logic Level E nhancement Mode Field Effect Transistor

SDU50N03L 数据手册

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S DU/D50N03L  
S amHop Microelectronics C orp.  
May,2004 ver1.1  
N-C hannel Logic Level E nhancement Mode Field E ffect Transistor  
PR ODUCT S UMMAR Y  
FE ATUR E S  
S uper high dense cell design for low R DS (ON).  
R ugged and reliable.  
VDS S  
ID  
R DS (ON) ( m  
)
Max  
8 @ VG S = 10V  
30V  
47A  
TO-252 and TO-251 P ackage.  
12 @ VG S = 4.5V  
D
D
G
S
G
S DU S E R IE S  
TO-252AA(D-P AK)  
S DD S E R IE S  
TO-251(l-P AK)  
S
ABS OLUTE MAXIMUM R ATING S (T =25 C unless otherwise noted)  
C
Limit  
30  
Unit  
V
P arameter  
S ymbol  
Drain-S ource Voltage  
V
V
DS  
G S  
V
G ate-S ource Voltage  
20  
I
D
47  
A
Drain C urrent-C ontinuous @ TJ =125 C  
a
-P ulsed  
117  
I
DM  
A
Drain-S ource Diode Forward C urrent  
50  
50  
I
S
A
W
C
P
D
Maximum P ower Dissipation  
@ Tc=25 C  
Operating and S torage Temperature R ange  
T
J
, TS TG  
-55 to 175  
THE R MAL C HAR AC TE R IS TIC S  
Thermal R esistance, J unction-to-C ase  
C/W  
C/W  
R
J C  
J A  
3
50  
Thermal R esistance, J unction-to-Ambient  
R
1

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