Datasheet > SDP75N03L

SDP75N03L

更新时间： 2024-02-16 09:16:23

品牌	Logo	应用领域
三合微科 - SAMHOP		晶体晶体管场效应晶体管
页数	文件大小	规格书
6页	494K
描述
N-Channel Logic Level E nhancement Mode Field Effect Transistor

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SDP75N03L 数据手册

S DP /B75N03L

S amHop Microelectronics C orp.

May,2004 ver1.1

N-C hannel Logic Level E nhancement Mode Field E ffect Transistor

PR ODUCT S UMMAR Y

FE ATUR E S

S uper high dense cell design for extremely low R DS (ON).

High power and current handling capability.

TO-220 & TO-263 package.

VDS S

R DS (on) ( m

Ω

) Max

7 @ VG S = 10V

11 @ VG S = 4.5V

30V

70A

S DP S E R IE S

TO-220

S DB S E R IE S

TO-263(DD-P AK)

ABS OLUTE MAXIMUM R ATING S (TC =25 C unless otherwise noted)

Limit

Unit

P arameter

S ymbol

Drain-S ource Voltage

G S

G ate-S ource Voltage

Drain C urrent-C ontinuous @ TJ =125 C

-P ulsed

210

Drain-S ource Diode Forward C urrent

Maximum P ower Dissipation

@ Tc=25 C

Operating and S torage Temperature R ange

, TS TG

-65 to 175

THE R MAL C HAR AC TE R IS TIC S

Thermal R esistance, J unction-to-C ase

C/W

J C

J A

62.5

Thermal R esistance, J unction-to-Ambient

12 3 4 5 6

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