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SC605-RL1 PDF预览

SC605-RL1

更新时间: 2024-11-21 06:10:15
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
8页 268K
描述
Speech And Music Processor

SC605-RL1 数据手册

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SC-605  
Speech And Music Processor  
Data sheet  
Features  
Advanced, integrated speech synthesizer for  
high-quality sound.  
640-word RAM.  
32 I/O pins consisting of: 24 general-purpose bit  
configurable I/O, 8 inputs with programmable  
pullup resistors and a dedicated interrupt (key-  
scan).  
Operates up to 12.32 MHz (performs up to 12  
MIPS).  
Single chip solution for up to 37 minutes of  
speech (using 2.36 Mb of onboard program  
plus data ROM).  
Direct speaker driver, 32 Ω (PDM).  
One-bit  
comparator with edge-detection  
Supports high-quality synthesis algorithms  
Such as: MX, CX, Simple CX, LX, ADPCM, and  
Polyphonic Music.  
interrupt service.  
Resistor-trimmed oscillator or 32.768 kHz  
crystal reference oscillator.  
Simultaneous speech plus music capabilities.  
Very low-power operation, ideal for hand-held  
devices.  
Serial scan port for in-circuit emulation and  
diagnostics.  
The SC-605 is sold in die form or 100-pin LQFP  
package.  
Low-voltage operation, sustainable by three  
batteries.  
An emulator device is available in a ceramic  
package for development (SC-614-P).  
Reduced power stand-by modes, less than 10  
µA in Deep-Sleep mode.  
Description  
SC-605 Block Diagram  
The SC-605 is  
a
low-cost, mixed-signal  
16-Bit  
10-Bit  
DAC  
processor that combines a speech synthesizer,  
general-purpose I/O, onboard ROM, and direct  
Microprocessor  
speaker drive in  
a
single package. The  
computational unit utilizes a powerful new DSP  
which gives the SC-605 unprecedented speed  
and computational flexibility compared with  
previous devices of its type. The SC-605  
supports a variety of speech and audio coding  
algorithms, providing a range of options with  
respect to speech duration and sound quality.  
640-words  
RAM  
TIMER 1  
TIMER 2  
PLLM  
32 I/O  
288 KBytes  
ROM  
COMPARATOR  
The device consists of a micro-DSP core,  
embedded program, and data memory, and a self-contained clock generation system. General-purpose  
periphery is comprised of 32 bits of partially configurable I/O. The core processor is a general-purpose 16-bit  
microcontroller with DSP capability. The basic core block includes computational unit (CU), data address unit,  
program address unit, two timers, eight level interrupt processor, and several system and control registers. The  
core processor gives the SC-605 break-point capability in emulation.  
The processor is Harvard type for efficient DSP algorithm execution. It requires separate program and data  
memory blocks to permit simultaneous access. The ROM has a protection scheme to prevent third-party  
pirating. It is configured in 32K 17-bit words.  
The total ROM space is divided into three areas:  
1) The lower 2K words are reserved by Sensory, Inc. for the purposes of a built-in self-test  
2) The upper 30K words are for user program/data  
3) Additional 1.83 Mb data ROM provides data for up to 37 minutes of speech.  
© 2002 Sensory Inc.  
P/N 80-0209-A  
1

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