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SC3368S/T PDF预览

SC3368S/T

更新时间: 2024-01-24 15:54:51
品牌 Logo 应用领域
AMCC 驱动信息通信管理光电二极管逻辑集成电路
页数 文件大小 规格书
8页 114K
描述
Low Skew Clock Driver, SC33 Series, 14 True Output(s), 0 Inverted Output(s), BICMOS, PDSO28, 0.300 INCH, SOIC-28

SC3368S/T 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84系列:SC33
输入调节:DIFFERENTIAL MUXJESD-30 代码:R-PDSO-G28
长度:17.8816 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:1反相输出次数:
端子数量:28实输出次数:14
最高工作温度:70 °C最低工作温度:
输出特性:SERIES-RESISTOR封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.25 ns座面最大高度:2.8194 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.4676 mm
最小 fmax:80 MHzBase Number Matches:1

SC3368S/T 数据手册

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®
DEVICE SPECIFICATION  
SC3318/68  
10 AND 14-OUTPUT LVTTL CLOCK DRIVERS  
FEATURES  
APPLICATIONS  
• Ten or fourteen clock outputs  
• Datacom and Telecom networks  
– Outputs operate at frequencies up to 80 MHz  
– Outputs grouped in two banks of five outputs  
on SC3318  
• Compatible with PowerPC™ processors  
• PCI Bus clock distribution  
• Workstation and server systems with  
high clock fanout  
– Outputs grouped in a bank of six and a bank of  
eight outputs on the SC3368  
• Compatible with Intel’s Pentium™ and  
Pentium Pro™ processors  
• All outputs are leading-edge synchronized  
to within 0.5 ns  
• Proprietary output drivers with:  
– Complementary 24 mA peak outputs,  
source and sink  
– 65–75source series termination  
– Dynamic drive adjustment to match load  
conditions  
– Edge rates less than 1.5 ns  
• Output levels comply with JEDEC LVTTL  
standard  
GENERAL DESCRIPTION  
The SC3318 and SC3368 are minimum skew clock  
drivers with ten or fourteen outputs. They employ a  
clock input from a single-ended TTL or an ECL differ-  
ential source operating between +5V and ground.  
This reference frequency input is received and distrib-  
uted to the clock output drivers. All outputs are  
“clamped” to conform with JEDEC LVTTL levels.  
Applied Micro Circuits Corporation (AMCC) uses  
proprietary complementary (source and sink) 24 mA  
peak output drivers. In addition to their drive capability,  
these circuits provide “source (series) termination” at  
the TTL outputs that minimize over/undershoot without  
requiring on-board termination networks. They are  
designed for a maximum output slew rate of 1.5V/ns  
to minimize simultaneous output-switching noise and  
distortion.  
• +5V VCC Supply  
• 28 SOIC package  
• Minimizes the ground-bounce, overshoot,  
and ringing problems often encountered  
when using CMOS and Bipolar drivers  
SC3318 Logic Diagram  
There are no Fa outputs on the SC3318  
5
LVTTL  
+Vcc  
Fb  
Fc  
TA  
DRIVER  
20K  
RESET  
R
S - R  
R
R
R
PECL  
TTL  
M
U
X
5
LVTTL  
TA  
DRIVER  
CLOCK SEL  
+5V  
GND  
Applied Micro Circuits Corporation  
6290 Sequence Dr., San Diego, CA 92121-4358  
1

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