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SC10003440 PDF预览

SC10003440

更新时间: 2024-11-28 07:05:47
品牌 Logo 应用领域
思佳讯 - SKYWORKS /
页数 文件大小 规格书
2页 43K
描述
CAPACITOR, FILM/FOIL, SILICON DIOXIDE AND NITRIDE, 0.0001uF, SURFACE MOUNT, 0404, CHIP

SC10003440 数据手册

 浏览型号SC10003440的Datasheet PDF文件第2页 
MIS Chip Capacitors  
SC Series  
Features  
Readily Available From Stock  
High Reliability Silicon Oxide–Nitride  
Dielectric  
Low Loss — Typically 0.04 dB in a 50  
System  
Operation through 26 GHz  
Wide Temperature Operation  
Absolute Maximum Ratings  
Characteristic  
Value  
Operating Temp Range (TOP  
Storage Temp Range (TSTG  
)
-65 to +200°C  
-65 to +200°C  
100 V  
)
Description  
Dielectric Withstanding Voltage  
Alpha’s MIS Chip Capacitors are available in a wide range  
of sizes and capacitance values.They are frequently used  
in applications requiring DC blocking, and RF bypassing,  
or as a fixed capacitance tuning element in filters,  
oscillators, and matching networks. The devices have a  
dielectric composed of thermally grown silicon dioxide over  
which a layer of silicon nitride is deposited.This dielectric  
possesses a low temperature coefficient of capacitance,  
very high insulation resistance. The devices also exhibit  
excellent long term stability making them suitable for high  
reliability applications. The capacitors have a high  
dielectric breakdown which permits the use of thin  
dielectrics resulting in larger capacitance per unit area than  
our previous catalog offerings.The temperature coefficient  
is less that 50 ppm/°C, and operation is suitable from  
-65°C to 200°C. Compared to ceramic capacitors,  
SkyworksMIS chip capacitors offer higher Q, and a lower  
insertion loss of 0.04 dB, in a 50 system. Insulation  
Electrical Specifications  
1:  
Capacitance Range 0.8 to 1000 pF  
Temperature Coefficient: 50 ppm/°C Typical  
2:  
Capacitance Tolerance  
20%  
Operating Temperature: -65°C to 200°C  
Dielectric Withstanding Voltage: 100 V  
5
Insulation Resistance: 10 Megohms Typical  
Leakage Current: Typ. < 1 nA  
Typical SPDT Switch  
BIAS  
BIAS  
OUTPUT  
5
resistance is greater than 10 M .To accommodate high  
C2  
C3  
volume automated assembly methods, wafers can be  
supplied on expanded film frame. To reduce cost, chips  
can be supplied with only sample testing packaged in vials.  
Packaging in waffle packs with 100% electrical test and  
visual inspection is always available if required.  
INPUT 1  
INPUT 2  
C1  
D1  
D2  
C4  
C2, C3 — Chip MIS Capacitor  
C1, C4 — Chip or Beam — Lead MIS Capacitor  
D1, D2 DSG6474 Beam — Lead PIN Diode  
Skyworks Solutions, Inc. [978] 241-7000 Fax [978] 241-7906 Email sales@skyworksinc.com www.skyworksinc.com  
1
Specifications subject to change without notice. 10/02A  

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