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SA556J PDF预览

SA556J

更新时间: 2024-11-21 20:05:03
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
19页 772K
描述
DUAL PULSE; RECTANGULAR, TIMER, CDIP14, CERAMIC, DIP-14

SA556J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.22模拟集成电路 - 其他类型:PULSE; RECTANGULAR
JESD-30 代码:R-GDIP-T14长度:19.56 mm
功能数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:4.5/16 V认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Analog Waveform Generation Functions
最大供电电压 (Vsup):16 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:BIPOLAR温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SA556J 数据手册

 浏览型号SA556J的Datasheet PDF文件第2页浏览型号SA556J的Datasheet PDF文件第3页浏览型号SA556J的Datasheet PDF文件第4页浏览型号SA556J的Datasheet PDF文件第5页浏览型号SA556J的Datasheet PDF文件第6页浏览型号SA556J的Datasheet PDF文件第7页 
NA556, NE556, SA556, SE556  
DUAL PRECISION TIMERS  
www.ti.com  
SLFS023GAPRIL 1978REVISED JUNE 2006  
FEATURES  
NA556...D OR N PACKAGE  
NE556...D, N, OR NS PACKAGE  
SA556...D OR N PACKAGE  
SE556...J PACKAGE  
Two Precision Timing Circuits Per Package  
Astable or Monostable Operation  
(TOP VIEW)  
TTL-Compatible Output Can Sink or Source  
up to 150 mA  
1DISCH  
1THRES  
1CONT  
1RESET  
1OUT  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Active Pullup or Pulldown  
CC  
2DISCH  
2THRES  
2CONT  
2RESET  
2OUT  
Designed to Be Interchangeable With  
Signetics NE556, SA556, and SE556  
APPLICATIONS  
1TRIG  
GND  
Precision Timers From Microseconds to  
Hours  
2TRIG  
8
Pulse-Shaping Circuits  
Missing-Pulse Detectors  
Tone-Burst Generators  
Pulse-Width Modulators  
Pulse-Position Modulators  
Sequential Timers  
Pulse Generators  
Frequency Dividers  
Application Timers  
Industrial Controls  
Touch-Tone Encoders  
DESCRIPTION/ORDERING INFORMATION  
These devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each  
package. These circuits can be operated in the astable or the monostable mode with external resistor-capacitor  
(RC) timing control. The basic timing provided by the RC time constant can be controlled actively by modulating  
the bias of the control-voltage input.  
The threshold (THRES) and trigger (TRIG) levels normally are two-thirds and one-third, respectively, of VCC  
.
These levels can be altered by using the control voltage (CONT) terminal. When the trigger input falls below  
trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the  
threshold input is above the threshold level, the flip-flop is reset, and the output is low. The reset (RESET) input  
can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop  
is reset and the output goes low. When the output is low, a low-impedance path is provided between the  
discharge (DISCH) terminal and ground (GND).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1978–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  

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