Datasheet > S79FL256SDSMFBG03

S79FL256SDSMFBG03

更新时间： 2023-12-06 20:03:14

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
134页	2169K
描述
Dual QSPI Flash

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S79FL256SDSMFBG03 数据手册

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256 Mb (32 MB) / 512 Mb (64MB) FL-S Flash

SPI Dual-Quad, 3.0 V

Signal descriptions

3.1

Input/output summary

Table 1

Dual-quad input/output descriptions

Signal name

Type

Description

Hardware Reset. LOW = device resets and returns to standby state,

ready to receive a command. The signal has an internal pull-up

resistor and may be left unconnected in the host system if not used.

RESET#

Input

SCK

CS#

IO0

IO1

IO2

IO3

IO4

IO5

IO6

IO7

VCC

VSS

Input

I/O

Serial Clock

Chip Select

I/O 0 for Quad SPI-1

I/O 1 for Quad SPI-1

I/O 2 for Quad SPI-1

I/O 3 for Quad SPI-1

I/O 0 for Quad SPI-2

I/O 1 for Quad SPI-2

I/O 2 for Quad SPI-2

I/O 3 for Quad SPI-2

Core Power Supply

Ground

I/O

Supply

Not Connected. No device internal signal is connected to the

package connector nor is there any future plan to use the connector

for a signal. The connection may safely be used for routing space for

a signal on a printed circuit board (PCB). However, any signal

connected to a NC pin must not have voltage levels higher than the

VCC absolute maximum (Supply Voltage).

Unused

Reserved for Future Use. No device internal signal is currently

connected to the package connector but there is potential future use

for the connector for a signal. It is recommended to not use RFU

connectors for PCB routing channels so that the PCB may take

advantage of future enhanced features in compatible footprint

devices.

RFU

Reserved

Do Not Use. A device internal signal may be connected to the

package connector. The connection may be used by Infineon for test

or other purposes and is not intended for connection to any host

system signal. Any DNU signal related function will be inactive when

the signal is at VIL. The signal has an internal pull-down resistor and

may be left unconnected in the host system or may be tied to VSS. Do

not use these connections for PCB signal routing channels. Do not

connect any host system signal to this connection.

DNU

Reserved

3.2

Multiple input / output (dual-quad SPI)

Quad Input / Output (I/O) commands send instructions to the memory only on the IO0 (quad SPI-1) and IO4 (quad

SPI-2) signals. Address is sent from the host to the memory as four bit (nibble) on IO0, IO1, IO2, IO3 (quad

SPI-1)and repeated on IO4, IO5, IO6, IO7 (quad SPI-2). Data is sent and returned to the host as bytes on IO0–IO7.

Datasheet

8 of 134

002-00518 Rev. *F

2022-05-27

1...5 6 789 10 11...134

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