256 Mb (32 MB) / 512 Mb (64MB) FL-S Flash
SPI Dual-Quad, 3.0 V
SPI with multiple input / output (SPI-MIO)
dual-quad
2
SPI with multiple input / output (SPI-MIO) dual-quad
Many memory devices connect to their host system with separate parallel control, address, and data signals that
require a large number of signal connections and larger package size. The large number of connections increase
power consumption due to so many signals switching and the larger package increases cost.
The S25FL-S dual-quad SPI devices reduce the number of signals for connection to the host system by serially
transferring all control, address, and data information over 10 signals. This reduces the cost of the memory
package, reduces signal switching power, and either reduces the host connection count or frees host connectors
for use in providing other features.
The S25FL-S dual-quad SPI devices use the industry standard single bit SPI using two quad SPI devices in each
package (quad SPI-1 and quad SPI-2). This interface is called dual-quad and enables support of byte wide (8 bit)
serial transfers. There is one package option available for S79FL256S/S79FL512S:
• 16-pin SOIC package
For documentation simplicity, all AC timings and waveforms and DC specification are defined using single CS#
(Chip Select) and SCK (Serial Clock) signals. For S79FL256S/S79FL512S, the CS# signals and the SCK signals for
quad SPI-1 and quad SPI-2 are internally tied together in the package.
Datasheet
7 of 134
002-00518 Rev. *F
2022-05-27