S79FL256S, S79FL512S
256 Mb (32 MB) / 512 Mb (64MB) FL-S Flash
SPI Dual-Quad, 3.0 V
Features
• Density
- 256 Mb (32 MB)
- 512 Mb (64 MB)
• SPI
- SPI clock polarity and phase modes 0 and 3
- DDR option
- Extended addressing: 24- or 32-bit address options
• READ commands
- Dual-Quad SPI Quad Read: 104 MHz clock rate (104 MB/s)
- Dual-Quad SPI Quad DDR Read: 80 MHz clock rate (160 MBps)
- Normal, Fast, Quad, Quad DDR
- AutoBoot - power-up or reset and execute a Normal or Quad read command automatically at a preselected
address
- Common flash interface (CFI) data for configuration information.
• Programming (3 MBps)
- 512-byte or 1024-byte page programming buffer options
- Quad-input page programming (QPP) for slow clock systems
- Automatic ECC - internal hardware error correction code generation with single bit error correction
• Erase (1 MBps)
- Hybrid sector size option – physical set of thirty two 8-KB sectors at top or bottom of address space with all
remaining sectors of 128 KB
- Uniform sector option – always erase 512-KB blocks for software compatibility with higher density and future
devices.
• Cycling endurance
- 100,000 program-erase cycles on any sector, minimum
• Data retention
- 20 year data retention, minimum
• Security features
- Separate one-time programmable (OTP) array of 2048 bytes
- Block protection:
• Status Register bits to control protection against program or erase of a contiguous range of sectors.
• Hardware and software control options
- Advanced sector protection (ASP)
• Individual sector protection controlled by boot code or password
• 65-nm MIRRORBIT™ technology with Eclipse architecture
• Core supply voltage: 2.7 V to 3.6 V
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
page 1 of 134
002-00518 Rev. *F
2022-05-27