Datasheet > S3040B

S3040B

更新时间： 2024-01-08 01:22:18

品牌	Logo	应用领域
AMCC		/
页数	文件大小	规格书
13页	117K
描述
IC,CLOCK/DATA RECOVERY,QFP,32PIN,PLASTIC

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中文翻译

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技术参数
数据手册

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S3040B 技术参数

是否Rohs认证：	不符合	生命周期：	Contact Manufacturer
Reach Compliance Code：	compliant	风险等级：	5.9
Base Number Matches：	1

S3040B 数据手册

DEVICE

SPECIFICATION

S3040B

SONET/SDH CLOCK RECOVERY UNIT

BiCMOS PECL CLOCK GENERATOR

FEATURES

GENERAL DESCRIPTION

The function of the S3040 clock recovery unit is to

derive high speed timing signals for SONET/SDH-

based equipment. The S3040 is implemented using

AMCC’s proven Phase Locked Loop (PLL) technology.

•

Micro-power Bipolar technology

Complies with Bellcore, and ITU-T specifica-

tions for jitter tolerance, jitter transfer and

jitter generation

The S3040 receives an OC-48/STM-16 scrambled

NRZ signal and recovers the clock from the data.

The chip outputs a differential bit clock and retimed

data.

•

On-chip high frequency PLL with internal

loop filter for clock recovery

Supports clock recovery for OC-48/STM-16

(2488.32 Mbit/s) NRZ data

The S3040 utilizes an on-chip PLL which consists

of a phase detector, a loop filter, and a Voltage

Controlled Oscillator (VCO). The phase detector

compares the phase relationship between the VCO

output and the serial data input. A loop filter con-

verts the phase detector output into a smooth DC

voltage, and the DC voltage is input to the VCO

whose frequency is varied by this voltage. A block

diagram is shown in Figure 2.

•

155.52 MHz reference frequency

Lock detect—monitors frequency

Low-jitter serial interface

+5 V supply

32 TQFP Package

Figure 1. System Block Diagram

S3041

MUX

S3042

OTX

ORX

S3040

OTX

DeMUX

S3042

DeMUX

S3041

MUX

S3040

ORX

April 6, 2000 / Revision NC

12 3 4 5 6 7...13

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