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S2D13P04B00B100-240 PDF预览

S2D13P04B00B100-240

更新时间: 2024-11-23 22:55:59
品牌 Logo 应用领域
精工 - SEIKO /
页数 文件大小 规格书
2页 670K
描述
CAMERA INTERFACE CHIP WITH 4 CHA

S2D13P04B00B100-240 数据手册

 浏览型号S2D13P04B00B100-240的Datasheet PDF文件第2页 
S2D13P04  
Multi Camera Interface ICs  
DESCRIPTIONS  
The S2D13P04 is a camera interface IC designed for automotive multiple camera systems.  
The S2D13P04 integrates four-channel NTSC/PAL video decoders, which allow to connect four analog cameras  
simultaneously,  
and synchronously output the image data asynchronously input from the four cameras by using internal VRAM.  
The S2D13P04 also has image processing functions such as image composition of the four camera image data,  
distortion correction, and interlaced-to-progressive scan conversion.  
The S2D13P04 has a large-capacity VRAM built in, so it does not require an external memory.  
„ FEATURES  
z
z
z
z
Video Input  
z
Output at stable frame rates  
x
x
x
x
Analog Video (CVBS) Input – 4 inputs  
PAL/NTSC Decoder – 4 channels  
NTSC-M, NTSC-J support  
x
x
x
720x480i  
640x480p  
640x480p  
enabled)  
720x576i  
768x576p  
640x480p  
30fps (NTSC interlaced output)  
30fps (NTSC progressive output)  
30fps (NTSC with distortion correction  
PAL-M, PAL-B, PAL-G, PAL-I, PAL-N support  
Video Output  
x
x
x
25fps (PAL interlaced output)  
25fps (PAL progressive output)  
25fps (PAL with distortion correction enabled)  
x
Digital Output 8-bit YUV422 (with HSYNC/VSYNC)  
ITU-R BT.656 *1  
Interlaced Output *2, 3  
Progressive Output  
x
x
z
Host Interface  
x
x
I2C Interface (Slave)  
SPI Interface (Slave)  
Video Output Mode  
x
x
x
x
Fixed Mode  
Auto Scan Mode *4  
Merge Mode *2  
z
z
z
No external RAM required  
Operating Temperature  
Operating Voltages Analog: 3.3±0.3V, IO: 3.3±0.3V  
Core: 1.8±0.15V, PLL: 1.8±0.15V  
Packages  
-40 to +85 (Ta)  
Compression Mode *2, 4  
Image Processing  
z
x
x
x
Image scaling function  
Interlaced-to-Progressive Conversion  
Distortion correction function *3, 4  
S2D13P04B00B100  
PFBGA10UX121 (10mm×10mm×1.2mm, 0.8mm-pitch)  
S2D13P04F00A100  
QFP15-100pin (14mm×14mm×1.7mm, 0.5mm-pitch)  
*1 The number of pixels per line may not comply with ITU-R BT.656 standard.  
*2 In Merge Mode or Compression Mode, outputs are compatible with Interlaced output.  
*3 When the distortion correction function is enabled, the interlaced output is not supported.  
*4 In the Compression Mode or Auto Scan Mode, the distortion correction is not supported.  
BLOCK DIAGRAM  
OSC  
PLL  
I2C/SPI  
Interface  
NTSC/PAL  
Video  
Scaler  
Scaler  
Scaler  
Scaler  
Decoder  
VRAM  
NTSC/PAL  
Video  
Decoder  
Video  
Mode  
Controller  
I/P  
NTSC/PAL  
Video  
Decoder  
Conversion  
Output  
Format  
Distortion  
Correction  
NTSC/PAL  
Video  
Decoder  

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