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S29XS256RABBHW010 PDF预览

S29XS256RABBHW010

更新时间: 2024-01-09 11:12:06
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 内存集成电路
页数 文件大小 规格书
73页 1172K
描述
Flash, 32MX8, 80ns, PBGA44, FBGA-44

S29XS256RABBHW010 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:VFBGA,Reach Compliance Code:compliant
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.47最长访问时间:80 ns
其他特性:BOTTOM BOOT BLOCK启动块:BOTTOM
JESD-30 代码:R-PBGA-B44长度:7.7 mm
内存密度:268435456 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
端子数量:44字数:33554432 words
字数代码:32000000工作模式:SYNCHRONOUS/ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-25 °C
组织:32MX8封装主体材料:PLASTIC/EPOXY
封装代码:VFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED编程电压:1.8 V
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):1.95 V最小供电电压 (Vsup):1.7 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.2 mmBase Number Matches:1

S29XS256RABBHW010 数据手册

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S29VS256R  
S29VS128R  
S29XS256R  
S29XS128R  
256/128 Mbit (32/16 Mbyte), 1.8 V, 16-bit  
Data Bus, Multiplexed MirrorBit Flash  
Features  
Single 1.8 V supply for read/program/erase (1.70–1.95 V)  
65 nm MirrorBit Technology  
10-year data retention (typical)  
Cycling Endurance: 100,000 cycles per sector (typical)  
RDY output indicates data available to system  
Command set compatible with JEDEC (42.4) standard  
Hardware sector protection via VPP pin  
Handshaking by monitoring RDY  
Address and Data Interface Options  
– Address and Data Multiplexed for reduced I/O count  
(ADM) S29VS-R  
– Address-High, Address-Low, Data Multiplexed for minimum I/O  
count (AADM) S29XS-R  
Offered Packages  
Simultaneous Read/Write operation  
32-word Write Buffer  
Bank architecture  
– 44-ball FBGA (6.2 mm x 7.7 mm x 1.0 mm)  
Low VCC write inhibit  
Write operation status bits indicate program and erase operation  
– Eight-bank  
completion  
Four 32-KB sectors at the top or bottom of memory array 255/127 of  
Suspend and Resume commands for Program and Erase  
128-KB sectors  
operations  
Programmable linear (8/16-word) with wrap around and continuous  
Asynchronous program operation, independent of burst control  
burst read modes  
register settings  
Secured Silicon Sector region consisting of 128 words each for  
VPP input pin to reduce factory programming time  
Support for Common Flash Interface (CFI)  
factory and customer  
General Description  
The Spansion S29VS256/128R and S29XS256/128R are MirrorBit® Flash products fabricated on 65 nm process technology. These  
burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate  
banks using multiplexed data and address pins. These products can operate up to 108 MHz and use a single VCC of  
1.7 V to 1.95 V that makes them ideal for the demanding wireless applications of today that require higher density, better  
performance, and lowered power consumption. The S29VS256/128R operates in ADM mode, while the S29XS256/128R can  
operate in the AADM mode.  
Performance Characteristics  
Read Access Times  
Current Consumption (typical values)  
Continuous Burst Read @ 108 MHz  
Speed Option (MHz)  
108  
72.34  
6.75  
80  
32 mA  
71 mA  
30 mA  
30 µA  
Max. Synch. Latency, ns (t  
Simultaneous Operation @ 108 MHz  
Program/Erase  
IA)  
Max. Synch. Burst Access, ns (t  
BACC)  
Max. Asynch. Access Time, ns (t  
)
Standby Mode  
ACC  
Max OE# Access Time, ns (t  
)
15  
OE  
Typical Program & Erase Times  
Single Word Programming  
Effective Write Buffer Programming (V ) Per Word  
170 µs  
14.1 µs  
9 µs  
CC  
Effective Write Buffer Programming (V ) Per Word  
PP  
Sector Erase (16 Kword Sector)  
Sector Erase (64 Kword Sector)  
350 ms  
800 ms  
Cypress Semiconductor Corporation  
Document Number: 002-00833 Rev. *H  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised December 21, 2015  

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