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S29PL127J70TFI080 PDF预览

S29PL127J70TFI080

更新时间: 2024-01-21 04:57:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 内存集成电路
页数 文件大小 规格书
80页 1019K
描述
Flash,

S29PL127J70TFI080 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:,Reach Compliance Code:compliant
风险等级:5.62内存集成电路类型:FLASH
峰值回流温度(摄氏度):NOT SPECIFIED编程电压:3 V
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

S29PL127J70TFI080 数据手册

 浏览型号S29PL127J70TFI080的Datasheet PDF文件第2页浏览型号S29PL127J70TFI080的Datasheet PDF文件第3页浏览型号S29PL127J70TFI080的Datasheet PDF文件第4页浏览型号S29PL127J70TFI080的Datasheet PDF文件第5页浏览型号S29PL127J70TFI080的Datasheet PDF文件第6页浏览型号S29PL127J70TFI080的Datasheet PDF文件第7页 
S29PL-J  
128-/64-/32-Mbit (8/4/2M × 16-Bit),  
3 V, Flash with Enhanced VersatileIO™  
S29PL-J, 128-/64-/32-Mbit (8/4/2M  
× 16-Bit), 3 V, Flash with Enhanced VersatileIO™  
Distinctive Characteristics  
Architectural Advantages  
Performance Characteristics  
128-/64-/32-Mbit Page Mode devices  
High Performance  
Page size of 8 words: Fast page read access from random  
locations within the page  
Page access times as fast as 20 ns  
Random access times as fast as 55 ns  
Single power supply operation  
Full Voltage range: 2.7 to 3.6 V read, erase, and program  
operations for battery-powered applications  
Power consumption (typical values at 10 MHz)  
45 mA active read current  
17 mA program/erase current  
Simultaneous Read/Write Operation  
0.2 A typical standby mode current  
Datacanbecontinuouslyreadfromonebankwhileexecuting  
erase/program functions in another bank  
Software Features  
Zero latency switching from write to read operations  
Software command-set compatible with JEDEC 42.4 standard  
– Backward compatible with Am29F, Am29LV, Am29DL, and  
AM29PDL families and MBM29QM/RM, MBM29LV,  
MBM29DL, MBM29PDL families  
FlexBank Architecture (PL127J/PL064J/PL032J)  
4 separate banks, with up to two simultaneous operations  
per device  
Bank A:  
CFI (Common Flash Interface) compliant  
Provides device-specific information to the system, allowing  
host software to easily reconfigure for different Flash devices  
PL127J -16 Mbit (4 Kw 8 and 32 Kw 31)  
PL064J - 8 Mbit (4 Kw 8 and 32 Kw 15)  
PL032J - 4 Mbit (4 Kw 8 and 32 Kw 7)  
Bank B:  
Erase Suspend / Erase Resume  
Suspends an erase operation to allow read or program op-  
erations in other sectors of same bank  
PL127J - 48 Mbit (32 Kw 96)  
PL064J - 24 Mbit (32 Kw 48)  
PL032J - 12 Mbit (32 Kw 24)  
Bank C:  
Program Suspend / Program Resume  
Suspends a program operation to allow read operation from  
sectors other than the one being programmed  
PL127J - 48 Mbit (32 Kw 96)  
PL064J - 24 Mbit (32 Kw 48)  
PL032J - 12 Mbit (32 Kw 24)  
Bank D:  
Unlock Bypass Program command  
PL127J -16 Mbit (4 Kw 8 and 32 Kw 31)  
PL064J - 8 Mbit (4 Kw 8 and 32 Kw 15)  
PL032J - 4 Mbit (4 Kw 8 and 32 Kw 7)  
Reduces overall programming time when issuing multiple  
program command sequences  
Enhanced VersatileI/O(VIO) Control  
Hardware Features  
Output voltage generated and input voltages tolerated on all  
control inputs and I/Os is determined by the voltage on the  
VIO pin  
VIO options at 1.8 V and 3 V I/O for PL127J devices  
3V VIO for PL064J and PL032J devices  
Ready/Busy# pin (RY/BY#)  
Provides a hardware method of detecting program or erase  
cycle completion  
Hardware reset pin (RESET#)  
Secured Silicon Sector region  
Hardware method to reset the device to reading array data  
Up to 128 words accessible through a command sequence  
Up to 64 factory-locked words  
Up to 64 customer-lockable words  
WP#/ ACC (Write Protect/Acceleration) input  
At VIL, hardware level protection for the first and last two 4K  
word sectors.  
At VIH, allows removal of sector protection  
At VHH, provides accelerated programming in a factory set-  
ting  
Both top and bottom boot blocks in one device  
Manufactured on 110-nm process technology  
Data Retention: 20 years typical  
Persistent Sector Protection  
A command sector protection method to lock combinations  
of individual sectors and sector groups to prevent program  
or erase operations within that sector  
Cycling Endurance: 1 million cycles per sector typical  
Sectors can be locked and unlocked in-system at VCC level  
Cypress Semiconductor Corporation  
Document Number: 002-00615 Rev. *F  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 20, 2019  

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