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S1C63666 PDF预览

S1C63666

更新时间: 2024-11-25 12:32:59
品牌 Logo 应用领域
爱普生 - EPSON /
页数 文件大小 规格书
2页 151K
描述
4-bit Single Chip Microcomputer

S1C63666 数据手册

 浏览型号S1C63666的Datasheet PDF文件第2页 
S1C63666  
4-bit Single Chip Microcomputer  
Original Architecture Core CPU  
Low Current Consumption  
High Speed Operation in Low Voltage  
„ DESCRIPTION  
The S1C63666 is a microcomputer which has a high-performance 4-bit CPU S1C63000 as the core CPU, ROM  
(16,384 words × 13 bits), RAM (5,120 words × 4 bits), multiply-divide circuit, serial interface, watchdog timer,  
programmable timer, time base counters (2 systems), an LCD driver that can drive a maximum 64 segments ×  
8 commons, sound generator and R/f converter built-in. The S1C63666 features low current consumption, this  
makes it suitable for battery driven portable equipment with R/f converter.  
„ FEATURES  
OSC1 oscillation circuit  
OSC3 oscillation circuit  
Instruction set  
32.768 kHz (Typ.) crystal oscillation circuit  
4 MHz (Max.) ceramic or 1.1 MHz (Typ.) CR oscillation circuit (*1)  
Basic instruction: 46 types (411 instructions with all)  
Addressing mode: 8 types  
Instruction execution time  
ROM capacity  
During operation at 32.768 kHz:  
During operation at 4 MHz:  
61 μsec 122 μsec 183 μsec  
0.5 μsec 1 μsec 1.5 μsec  
Code ROM:  
Data ROM:  
16,384 words × 13 bits  
4,096 words × 4 bits  
5,120 words × 4 bits  
RAM capacity  
Data memory:  
Display memory: 160 words × 4 bits  
Input port  
Output port  
I/O port  
Serial interface  
LCD driver  
Time base counter  
8 bits (Pull-down resistors may be supplemented *1)  
8 bits (It is possible to switch the 2 bits to special output *2)  
8 bits (It is possible to switch the 4 bits to serial I/F input/output *2)  
1 port (8-bit clock synchronous system)  
64 segments × 4, 5 or 8 commons (*2)  
Clock timer  
Stopwatch timer (1/1000 sec, with direct key input function)  
8 bits × 3 ch. or 16 bits × 1 ch. + 8 bits × 1 ch. (*2)  
Built-in  
Programmable timer  
Watchdog timer  
Sound generator  
R/f converter  
Multiply-divide circuit  
With envelope and 1-shot output functions  
2 ch., CR oscillation type, 20-bit counter  
8-bit accumulator × 1 ch.  
Multiplication: 8 bits × 8 bits -> 16-bit product  
Division: 16 bits ÷ 8 bits -> 8-bit quotient and 8-bit remainder  
1 ch.  
Analog comparator  
Supply voltage detection (SVD)  
Criteria voltage is selectable from 8 types (1.85 to 2.90 V *2)  
(External voltage detection is possible *1)  
External interrupt  
Internal interrupt  
Input port interrupt:  
Clock timer interrupt:  
2 systems  
4 systems  
Stopwatch timer interrupt:  
Programmable timer interrupt:  
Serial interface interrupt:  
R/f converter interrupt:  
4 systems  
3 systems  
1 system  
2 systems  
Power supply voltage  
2.4 to 3.6 V: Max. 4 MHz operation in normal mode  
2.4 to 3.6 V: 32 kHz operation in halver mode  
1.8 to 3.6 V: 32 kHz operation in normal mode  
-20 to 70°C  
Operating temperature range  
Current consumption (Typ.)  
Low-speed operation (OSC1 = 32 kHz crystal oscillation):  
During HALT  
During operation 3.0 V (LCD ON, halver mode)  
High-speed operation (OSC3):  
3.0 V (LCD ON, halver mode)  
0.65 µA  
2.5 µA  
During operation 3.0 V (LCD ON)  
QFP20-144pin (plastic) or chip  
1 mA  
Shipment form  
*1: Can be selected with mask option  
*2: Can be selected with software  

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