5秒后页面跳转
RX5005H PDF预览

RX5005H

更新时间: 2024-02-18 10:36:05
品牌 Logo 应用领域
RFM 电信集成电路数据通信无线
页数 文件大小 规格书
10页 73K
描述
Designed for Short-Range Wireless Control and Data Communications

RX5005H 技术参数

生命周期:Obsolete包装说明:QCCN,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.21Is Samacsys:N
JESD-30 代码:R-XQCC-N20长度:10.033 mm
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:QCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER
认证状态:Not Qualified座面最大高度:2.032 mm
标称供电电压:3 V表面贴装:YES
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:1.016 mm
端子位置:QUAD宽度:6.8 mm
Base Number Matches:1

RX5005H 数据手册

 浏览型号RX5005H的Datasheet PDF文件第2页浏览型号RX5005H的Datasheet PDF文件第3页浏览型号RX5005H的Datasheet PDF文件第4页浏览型号RX5005H的Datasheet PDF文件第6页浏览型号RX5005H的Datasheet PDF文件第7页浏览型号RX5005H的Datasheet PDF文件第8页 
RX5005H ASH Receiver Block Diagram  
CN TRL1  
CN TRL0  
VCC1: Pin 2  
VCC2: Pin 16  
GND1: Pin 1  
GND2: Pin 10  
GND3: Pin 19  
17  
18  
Power  
Down  
Control  
Bias Control  
NC:  
Pin 8  
RREF: Pin 11  
CMPIN: Pin 6  
Antenna  
RFIO  
Log  
BBOUT  
DS2  
Ref  
SAW  
CR Filter  
SAW  
Delay Line  
Low-Pass  
Filter  
Peak  
Detector  
RFA1  
RFA2  
Detector  
BB  
5
6
20  
C BBO  
ESD  
Choke  
dB Below  
Peak Thld  
9
LPFADJ  
PKDET  
4
C PKD  
AND  
RXDATA  
7
R LPF  
AGC Set  
AGC  
DS1  
Gain Select  
Ref  
Thld  
AGC Reset  
Pulse Generator  
& RF Amp Bias  
AGC  
Control  
Threshold  
Control  
11  
AGCCAP  
3
13  
12  
PRATE 14  
R PR  
15 PWIDTH  
R PW  
THLD1  
THLD2  
C AGC  
R TH1  
R TH2  
R REF  
Figure 2  
RX5000 Series ASH Receiver Block Diagram  
The detector output drives a gyrator filter. The filter provides a three-pole,  
0.05 degree equiripple low-pass response with excellent group delay flat-  
ness and minimal pulse ringing. The 3 dB bandwidth of the filter can be set  
from 4.5 kHz to 1.8 MHz with an external resistor.  
Figure 2 is the general block diagram of the RX5005H series ASH receiver.  
Please refer to Figure 2 for the following discussions.  
Antenna Port  
The filter is followed by a base-band amplifier which boosts the detected  
signal to the BBOUT pin. When the receiver RF amplifiers are operating at  
a 50%-50% duty cycle, the BBOUT signal changes about 10 mV/dB, with  
a peak-to-peak signal level of up to 685 mV. For lower duty cycles, the mV/  
dB slope and peak-to-peak signal level are proportionately less. The de-  
tected signal is riding on a 1.1 Vdc level that varies somewhat with supply  
voltage, temperature, etc. BBOUT is coupled to the CMPIN pin or to an ex-  
ternal data recovery process (DSP, etc.) by a series capacitor. The correct  
value of the series capacitor depends on data rate, data run length, and  
other factors as discussed in the ASH Transceiver Designer’s Guide.  
The only external RF components needed for the receiver are the antenna  
and its matching components. Antennas presenting an impedance in the  
range of 35 to 72 ohms resistive can be satisfactorily matched to the RFIO  
pin with a series matching coil and a shunt matching/ESD protection coil.  
Other antenna impedances can be matched using two or three compo-  
nents. For some impedances, two inductors and a capacitor will be re-  
quired. A DC path from RFIO to ground is required for ESD protection.  
Receiver Chain  
The output of the SAW filter drives amplifier RFA1. This amplifier includes  
provisions for detecting the onset of saturation (AGC Set), and for switching  
between 35 dB of gain and 5 dB of gain (Gain Select). AGC Set is an input  
to the AGC Control function, and Gain Select is the AGC Control function  
output. ON/OFF control to RFA1 (and RFA2) is generated by the Pulse  
Generator & RF Amp Bias function. The output of RFA1 drives the SAW  
delay line, which has a nominal delay of 0.5 µs.  
When an external data recovery process is used with AGC, BBOUT must  
be coupled to the external data recovery process and CMPIN by separate  
series coupling capacitors. The AGC reset function is driven by the signal  
applied to CMPIN.  
When the receiver is placed in the power-down (sleep) mode, the output  
impedance of BBOUT becomes very high. This feature helps preserve the  
charge on the coupling capacitor to minimize data slicer stabilization time  
when the receiver switches out of the sleep mode.  
The second amplifier, RFA2, provides 51 dB of gain below saturation. The  
output of RFA2 drives a full-wave detector with 19 dB of threshold gain. The  
onset of saturation in each section of RFA2 is detected and summed to pro-  
vide a logarithmic response. This is added to the output of the full-wave de-  
tector to produce an overall detector response that is square law for low  
signal levels, and transitions into a log response for high signal levels. This  
combination provides excellent threshold sensitivity and more than 70 dB  
of detector dynamic range. In combination with the 30 dB of AGC range in  
RFA1, more than 100 dB of receiver dynamic range is achieved.  
Data Slicers  
The CMPIN pin drives two data slicers, which convert the analog signal  
from BBOUT back into a digital stream. The best data slicer choice de-  
pends on the system operating parameters. Data slicer DS1 is a capacitive-  
ly-coupled comparator with provisions for an adjustable threshold. DS1  
provides the best performance at low signal-to-noise conditions. The  
RF Monolithics, Inc.  
RFM Europe  
Phone: (972) 233-2903  
Phone: 44 1963 251383  
Fax: (972) 387-8148  
Fax: 44 1963 251510  
E-mail: info@rfm.com  
http://www.rfm.com  
RX5005H-100405  
Page 5 of 10  
©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc.  

与RX5005H相关器件

型号 品牌 描述 获取价格 数据表
RX500-6 NTE ECG Cleaner/Lubricant

获取价格

RX5050-0 RICHCO CABLE & FIBER MANAGEMENT

获取价格

RX5050-4 RICHCO CABLE & FIBER MANAGEMENT

获取价格

RX5500 RFM 433.92 MHz Hybrid Receiver

获取价格

RX5500-1 ETC Analog IC

获取价格

RX5501 RFM 315.00 MHz Hybrid Receiver

获取价格