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RV5C339A_03 PDF预览

RV5C339A_03

更新时间: 2024-11-29 03:21:11
品牌 Logo 应用领域
理光 - RICOH 监视器时钟
页数 文件大小 规格书
46页 364K
描述
3-WIRE SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION

RV5C339A_03 数据手册

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3-WIRE SERIAL INTERFACE REAL-TIME CLOCK IC  
WITH VOLTAGE MONITORING FUNCTION  
NO.EA-055-0208  
RV5C339A  
OUTLINE  
The RV5C339A is a CMOS real-time clock IC connected to the CPU by three signal lines CE (Chip Enable), SCLK  
(Serial Clock), and SIO (Serial Input/Output), and configured to perform serial transmission of time and calendar  
data to the CPU. This model incorporates different functional circuits. The periodic interrupt circuit is configured  
to generate interrupt signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm  
circuits generate interrupt signals at preset times. The oscillation circuit is driven under constant voltage so that  
fluctuations in oscillation frequency due to voltage are small and supply current is also small (TYP. 0.35µA at 3  
volts). The oscillation halt sensing circuit can be used to judge the validity of internal data in such events as power-  
on. The supply voltage monitoring circuit is configured to record a drop in supply voltage below two selectable  
supply voltage monitoring threshold settings. The 32-kHz clock output function (Nch. open drain) is intended to  
output sub-clock pulses for the external microcomputer. The oscillation adjustment circuit is intended to adjust time  
counts with high precision by correcting deviations in the oscillation frequency of the crystal oscillator. This model  
comes in an ultra-compact 10-pin SSOP-G (with a height of 1.20mm and a pin pitch of 0.5mm).  
FEATURES  
• Timekeeping supply voltage ranging from 1.45 to 5.5 volts  
• Low supply current: TYP. 0.35µA (MAX. 0.8µA) at 3 volts (at 25˚C)  
• Only three signal lines (SCLK, SIO, and CE) required for connection to the CPU.  
Maximum clock frequency of 2 MHz (with VDD of 5 volts)  
• Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days, and  
weeks) (in BCD format)  
• 1900/2000 identification bit for Year 2000 compliance  
• Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month) to  
the CPU and provided with an interrupt flag and an interrupt halt circuit  
• 2 alarm circuits (Alarm_W for week , hour , and minute alarm settings and Alarm_D for hour and minute alarm  
settings)  
• 32-kHz clock circuit (Nch. open drain output)  
Designed to disable 32-kHz clock output in response to a command from the host computer.  
• Oscillation halt sensing circuit which can be used to judge the validity of internal data  
• Supply voltage monitoring circuit with two supply voltage monitoring threshold settings  
• Automatic identification of leap years up to the year 2099  
• Selectable 12-hour and 24-hour mode settings  
• Built-in oscillation stabilization capacitors (CG and CD)  
• High precision oscillation adjustment circuit  
• CMOS process  
1

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