RT6191A
signal is externally compensated on COMPV pin to
compare with the inductor current sensed on the output
current sense resistor. As the signal relative inductor
current falls below the compensated error signal, the
HDRV1 will be turned on with a time interval to make
inductor current ramp up. As the inductor current
reaches to peak current threshold (0x09[5:0]), the
HDRV1 is turned off and LDRV1 will be turned on until
an internal oscillator initializes next switching cycle.
Mode Selection
The RT6191A provides operation mode selection for
light load Power Saving Mode (PSM) and Forced-CCM
Mode (FCCM) by using register 0x0D[7]. The default
factory setting of operation mode is light load PSM.
Power Saving Mode
When 0x0D[7] = 0, RT6191A operates in PSM and
automatically reduces switching frequency at light-load
conditions to maintain high efficiency. The internal zero
current detection (ZCD) circuitry will be enabled to
TM
AnyCurrent Constant Current (CC) Regulation
The RT6191A also implements average current control
loop by sensing the voltage across output current sense
resistor R30 for output constant current (CC) regulation.
The voltage across output current sense resistor is used
to compare with the output CC level as register
0x03/0x04 to obtain an error signal, and then this error
signal is externally compensated on COMPI pin. When
the voltage across output current sense resistor is
higher than output CC level, the COMPI pin voltage will
fall below COMPV pin voltage to limit and keep the
output current as output CC level. As the output current
becomes higher than output CC level, RT6191A will
limit the output current, and then the output voltage will
be lower than regulation point until UVP happens. In
addition, it is recommended to use 10m/1206 with 1W
power dissipation as current sense resister for correct
operation.
sense the inductor current by utilizing R
of the Q2
DS(ON)
N-MOSFET in typical application circuit. As the inductor
current drops to zero and becomes negative, both
HDRV1 and LDRV1 are turned off with the output
capacitor supplying the load current until the output
voltage falls below the internal reference voltage. In
reverse, when the output current increases from light
load to heavy load, the switching frequency will increase
to 250kHz (default factory setting) as the inductor
current reaches the continuous conduction condition.
FCCM Mode
When 0x0D[7] = 1, the internal ZCD circuitry is disabled
and the RT6191A operates in FCCM with typically
250kHz (default factory setting) at any load condition.
This mode trades off reduced light load efficiency for low
output voltage ripple, tight output voltage regulation,
and constant switching frequency.
Bypass Mode
RT6191A implements a Bypass mode operation to
enhance system efficiency when the output voltage
becomes very close to the input voltage. After setting
the output voltage to be at least 0.3V higher than the
input voltage, the RT6191A will enter the Bypass mode
immediately, then external N-MOSFET Q1 is fully
turned on and Q2 is fully turned off. In Bypass mode,
the external ALERT pin can also be asserted if any
status is changed or protection is triggered. When the
output voltage is lower than the input voltage, the
RT6191A will return to Buck mode automatically to
maintain normal output voltage regulation. Therefore,
the RT6191A is more flexible for system firmware
design by operation mode transition between Buck and
ADC Reporting
The RT6191A provides ADC function to report
input/output voltage and current, VBUSC voltage and
TSEN pin voltage by utilizing register 0x12 to 0x1B and
0x33 to 0x34 with 11-bit resolution. Register 0x10[1]
and 0x32[1] are the enable control bits for ADC function,
and 0x10[7:6] is the average times of ADC function. The
default factory setting of 0x10 is 82h and 0x32 is 00h for
ADC function default enable with average 8 times
except VBUSC voltage reporting. Please see the I2C
register map for detailed description of register 0x12 to
0x1B.
2
Bypass modes without setting any register through I C
interface.
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DS6191A-00
December 2022
8