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RC7101 PDF预览

RC7101

更新时间: 2024-09-25 23:32:27
品牌 Logo 应用领域
其他 - ETC 时钟驱动器
页数 文件大小 规格书
8页 66K
描述
Eighteen Distributed-Output Clock Driver

RC7101 数据手册

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www.fairchildsemi.com  
RC7 1 0 1  
Lo w S k e w Bu ffe rs  
100MHz SDRAM Clock Buffers  
Features  
Description  
• 18 skew controlled outputs  
The RC7101 is a low voltage eighteen output clock buffer  
which supports 4 DIMMs. The skew between any two out-  
puts is less than 250 pS and the buffers can be individually  
enabled or disabled by programming via the I2C serial inter-  
face. The SDATA and SCLK serial inputs both have internal  
pull-up resistors.  
• Supports up to four SDRAM DIMMs  
• Skew between any two outputs is less than 250 pS  
¥ I2C Serial Interface for programming options  
• Multiple power and ground pins for noise reduction  
• Single 3.3V power supply  
• 48 Pin SSOP package  
An Output Enable (OE) pin is also provided so that all the  
outputs can be tri-stated when held low. This pin is normally  
high and has an internal pull-up resistor.  
Applications  
• SDRAM Clock Buffers for Intel’s 440BX chip set  
OE SDRAM0:3 SDRAM4:7 SDRAM8:11 SDRAM12:15 SDRAM16:17  
0
1
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
BUF_IN  
BUF_IN  
BUF_IN  
BUF_IN  
BUF_IN  
Block Diagram  
SDRAM0  
SDRAM1  
SDRAM2  
SDATA  
I2C  
SCLOCK  
SDRAM3  
SDRAM4  
SDRAM5  
SDRAM6  
SDRAM7  
SDRAM8  
SDRAM9  
BUF_IN  
SDRAM10  
SDRAM11  
SDRAM12  
SDRAM13  
SDRAM14  
SDRAM15  
SDRAM16  
SDRAM17  
OE  
Rev. 0.5.2  
ADVANCED INFORMATION describes products that are not in full production at the time of printing. Specifications are based on design goals  
and limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.  

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