Datasheet > RAA214403

RAA214403

更新时间： 2024-03-03 10:10:10

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
23页	1956K
描述
Low Iq Current LDO Regulator with Fixed 3.3V Output

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RAA214403 数据手册

RAA214403, RAA214404, RAA214405, RAA214409 Datasheet

2. Pin Information

2.1

Pin Assignments

VIN

GND

VOUT

GND

VOUT

SOT-23

SOT-89

Top View

2.2

Pin Descriptions

Pin Number

Pin Name

Description

5-Ld SOT-23 3-Ld SOT-89

VIN is the input voltage pin. This pin supplies power to the regulator. Requires a

minimum ceramic bypass capacitor of 2.2µF. Applications with large load transients

may require higher input capacitance. Place the input capacitor as close to the

device input as possible.

VIN

GND

GND is the ground pin. This pin must be tied to the PCB ground plane.

EN is the ENABLE pin. When set to LOW, it disables the device; when set to HIGH,

it enables the device. This pin must not be left floating. When this pin is not being

used, it must be tied to VIN.

NC (No Connection) This pin can be tied to ground or left floating. No internal

connection.

VOUT is the output pin. This pin provides power to the load. For stable operation

across the full temperature range, VIN range, output range, and load extremes a

minimum 2.2µF capacitor is required from VOUT to GND. For best transient

response, use a 4.7µF or larger ceramic capacitor. Place the output capacitor as

close to the device output as possible.

VOUT

R16DS0291EU0100 Rev.1.00

Aug 8, 2023

Page 4

1 2 345 6 7...23

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