Datasheet
R01DS0348EJ0100
Rev.1.00
RL78/G1C
RENESAS MCU
Aug 08, 2013
Integrated USB Controller, True Low Power Platform (as low as 112.5 µA/MHz, and 0.61 µA for RTC + LVD),
2.4 V to 5.5 V Operation, 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All USB Based Applications
1. OUTLINE
<R>
1.1 Features
Ultra-Low Power Technology
• 2.4 V to 5.5 V operation from a single supply
• Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA
• Halt (RTC + LVD): 0.57 µA
Direct Memory Access (DMA) Controller
• Up to 2 fully programmable channels
• Transfer unit: 8- or 16-bit
Multiple Communication Interfaces
• Up to 2 x I2C master
• Supports snooze
• Operating: 71 µA/MHz
• Up to 1 x I2C multi-master
• Up to 2 x CSI (7-, 8-bit)
16-bit RL78 CPU Core
• Delivers 31 DMIPS at maximum operating frequency
of 24 MHz
• Up to 1 x UART (7-, 8-, 9-bit)
Extended-Function Timers
• Multi-function 16-bit timer TAU: Up to 4 channels
(remote control output available)
• Real-time clock (RTC): 1 channel (full calendar and
alarm function with watch correction function)
• 12-bit interval timer: 1 channel
• Instruction Execution: 86% of instructions can be
executed in 1 to 2 clock cycles
• CISC Architecture (Harvard) with 3-stage pipeline
• Multiply Signed & Unsigned: 16 x 16 to 32-bit result in
1 clock cycle
• MAC: 16 x 16 to 32-bit result in 2 clock cycles
• 16-bit barrel shifter for shift & rotate in 1 clock cycle
• 1-wire on-chip debug function
• 15 kHz watchdog timer: 1 channel (window function)
Rich Analog
• ADC: Up to 9 channels, 8/10-bit resolution, 2.1 µs
minimum conversion time
• Internal voltage reference (1.45 V)
• On-chip temperature sensor
Code Flash Memory
• Density: 32 KB
• Block size: 1 KB
• On-chip single voltage flash memory with protection
from block erase/writing
• Self-programming with secure boot swap function
and flash shield window function
Safety Features (IEC or UL 60730 compliance)
• Flash memory CRC calculation
• RAM parity error check
• RAM write protection
• SFR write protection
• Illegal memory access detection
• Clock stop/frequency detection
• ADC self-test
Data Flash Memory
• Data Flash with background operation
• Data flash size: 2 KB
• Erase Cycles: 1 Million (typ.)
• Erase/programming voltage: 2.4 V to 5.5 V
RAM
• I/O port read back function (echo)
• 5.5 KB size options
• Supports operands or instructions
• Back-up retention in all modes
General Purpose I/O
• 5 V tolerant, high-current (up to 20 mA per pin)
• Open-Drain, Internal Pull-up support
High-speed On-chip Oscillator
• 24 MHz with +/− 1% accuracy over voltage (2.4 V to
5.5 V) and temperature (−20°C to +85°C)
• Pre-configured settings: 48 MHz, 24 MHz (TYP.)
Operating Ambient Temperature
• Standard: −40°C to + 85°C
• Extended: −40°C to + 105°C
Reset and Supply Management
Package Type and Pin Count
• 32-pin plastic HWQFN (5 x 5)
• 32-pin plastic LQFP (7 x 7)
• 48-pin plastic LFQFP (7 x 7)
• 48-pin plastic HWQFN (7 x 7)
• Power-on reset (POR) monitor/generator
• Low voltage detection (LVD) with 9 setting options
(Interrupt and/or reset function)
USB
• Complying with USB version 2.0, incorporating
host/function controller
• Corresponding to full-speed transfer (12 Mbps) and
low-speed (1.5 Mbps)
• Complying with Battery Charging Specification
Revision 1.2
• Compliant with the 2.1A/1.0A charging mode
prescribed in the Apple Inc. MFi specification in the
USB power supply component specificationNote
Note To use the Apple Inc. battery charging mode, you must
join in Apple's Made for iPod/iPhone/iPad (MFi)
licensing program. Before requesting this specification
from Renesas Electronics, please join in the Apple's
MFi licensing program.
R01DS0348EJ0100 Rev.1.00
Aug 08, 2013
Page 1 of 135
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