5秒后页面跳转
QS34XST257Q3X PDF预览

QS34XST257Q3X

更新时间: 2024-11-23 15:48:55
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
10页 127K
描述
Logic Circuit, CMOS, PDSO80

QS34XST257Q3X 技术参数

是否Rohs认证:不符合生命周期:Obsolete
Reach Compliance Code:not_compliant风险等级:5.92
Is Samacsys:NJESD-30 代码:R-PDSO-G80
JESD-609代码:e0端子数量:80
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP80,.25,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH电源:5 V
认证状态:Not Qualified子类别:Other Logic ICs
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
Base Number Matches:1

QS34XST257Q3X 数据手册

 浏览型号QS34XST257Q3X的Datasheet PDF文件第2页浏览型号QS34XST257Q3X的Datasheet PDF文件第3页浏览型号QS34XST257Q3X的Datasheet PDF文件第4页浏览型号QS34XST257Q3X的Datasheet PDF文件第5页浏览型号QS34XST257Q3X的Datasheet PDF文件第6页浏览型号QS34XST257Q3X的Datasheet PDF文件第7页 
QUICKSWITCH® PRODUCTS  
IDTQS34XST257  
HIGH-SPEED CMOS  
SYNCHROSWITCH™ 32:16 MUX/  
DEMUX WITH ACTIVE TERMINATORS  
FEATURES:  
DESCRIPTION:  
Enhanced N channel FET with no inherent diode to Vcc  
Bidirectional signal flow  
Flow-through pinout  
Zero propagation delay, zero ground bounce  
16 banks of 2:1 Mux/Demux  
Port select synchronous to the clock  
Clock enable and Asynchronous enable  
“Bus-hold” terminators on the Demux side  
Undershoot clamp diodes on all switch and control pins  
Asynchronous SEL option  
The QS34XST257 is a high-speed CMOS quad 32:16 multiplexer/  
demultiplexerwithactiveterminators(bus-holdcircuits)onthedemuxside.  
It is organized as four independent quad 2:1 mux/demux blocks. Port  
selectionandconnection, controlledbySELsignals, canbe eitherasyn-  
chronous orsynchronous. Inthe synchronous mode, the AorBporttoY  
portconnectionis updatedontherisingedgeoftheinputclockCLK. Once  
the port-to-portconnectionis made,data flowcanbe bi-directionalwitha  
typical 250ps propagation delay through the switch. Clock Enable,  
overriding Asynchronous Enable, and Asynchronous Select controls  
provide additionaldesignflexibility.  
Break-before-make feature  
The bus-hold circuits latch the last data driven on the demux side,  
providinginfiniteholdtimeandglitch-freesignaltransitions. Synchronous  
controlsandbus-holdeasetimingconstraintsinmanyhighspeeddatamux/  
demux applications, such as bank interleaving. The QS34XST257 is  
available inthe space-saving,80-pindual-in-line MillipaQpackage.  
Available in 80-pin MillipaQ (Q3)  
Bus-hold eliminates floating bus lines and reduces static power  
consumption  
APPLICATIONS:  
The QS34XST257 is characterized for operation at -40°C to +85°C.  
Memory Interleaving  
FUNCTIONALBLOCKDIAGRAM  
R
=
T
SELn  
CLKn  
CONTROL  
CLKENn  
LOGIC  
OEn  
SYNCn  
An0  
Bn0  
An1  
Bn1  
An2  
Bn2  
An3  
Bn3  
T
T
T
T
T
T
T
T
Yn0  
Yn1  
Yn2  
Yn3  
NOTE: One of four blocks shown.  
INDUSTRIAL TEMPERATURE RANGE  
NOVEMBER 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-5532/-  

与QS34XST257Q3X相关器件

型号 品牌 获取价格 描述 数据表
QS34XV245 ETC

获取价格

3.3V HIGH SPEED 32-BIT MULTIWIDTH?? BUS SWITCH
QS34XVH2245Q3 IDT

获取价格

Bus Driver, CBT/FST/QS/5C/B Series, 4-Func, 8-Bit, True Output, CMOS, PDSO80, QVSOP-80
QS34XVH2245Q38 IDT

获取价格

Bus Driver, CBT/FST/QS/5C/B Series, 4-Func, 8-Bit, True Output, CMOS, PDSO80, QVSOP-80
QS34XVH2245Q3G IDT

获取价格

2.5V / 3.3V 32-BIT HIGH BANDWIDTH BUS SWITCH
QS34XVH2245Q3G8 IDT

获取价格

2.5V / 3.3V 32-BIT HIGH BANDWIDTH BUS SWITCH
QS34XVH245Q3 ETC

获取价格

Bus Switch
QS34XVH245Q3X ETC

获取价格

Bus Switch
QS35257Q IDT

获取价格

Logic Circuit, CMOS, PDSO16
QS35257S1 IDT

获取价格

Decoder/Driver, True Output, CMOS, PDSO16
QS35390SO IDT

获取价格

Multiplexer And Demux/Decoder, CMOS, PDSO28