Datasheet > PW5D8EA

PW5D8EA

更新时间： 2024-11-08 17:15:43

品牌	Logo	应用领域
尼克森微 - NIKOSEM		/
页数	文件大小	规格书
9页	835K
描述
SOT-723

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中文翻译

获取价格

数据手册

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PW5D8EA 数据手册

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

PW5D8EA

NIKO-SEM

SOT-723

Halogen-Free & Lead-Free

PRODUCT SUMMARY

V_(BR)DSS

20V

R_DS(ON)

I_D

0.8A

300mΩ

Features

• Pb−Free, Halogen Free and RoHS compliant.

• Low R_DS(on)to Minimize Conduction Losses.

• Ohmic Region Good R_DS(on)Ratio.

• Optimized Gate Charge to Minimize Switching Losses.

•ESD Protection - HBM Class : 1C.

Applications

• Protection Circuits Applications.

• Logic/Load Switch Circuits Applications.

• Space Limit & Smart Devices Applications.

G: GATE

D: DRAIN

S: SOURCE

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

Gate-Source Voltage

SYMBOL

LIMITS

±10

UNITS

V_GS

T_A= 25 °C

T_A= 70 °C

0.8

Continuous Drain Current²

Pulsed Drain Current¹

Power Dissipation

I_D

I_DM

0.62

2.4

T_A= 25 °C

T_A= 70 °C

0.3

P_D

°C

0.2

Operating Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JA

TYPICAL

MAXIMUM

400

UNITS

°C / W

Junction-to-Ambient

¹Limited by maximum junction temperature.

²Limited by package.

ELECTRICAL CHARACTERISTICS (T_J= 25 °C, Unless Otherwise Noted)

LIMITS

MIN TYP MAX

PARAMETER

SYMBOL

TEST CONDITIONS

STATIC

UNIT

Drain-Source Breakdown Voltage

Gate Threshold Voltage

V_(BR)DSS

V_GS(th)

V_GS= 0V, I_D= 250A

V_DS= V_GS, I_D= 250A

0.4 0.63

I-27-1

REV 1.2

12 3 4 5 6 7...9

中文翻译

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