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PSD501B1-C-70U PDF预览

PSD501B1-C-70U

更新时间: 2024-11-15 22:09:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 并行IO端口微控制器和处理器外围集成电路可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
153页 1029K
描述
Low Cost Field Programmable Microcontroller Peripherals

PSD501B1-C-70U 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:TQFP-68
针数:80Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.85Is Samacsys:N
最长访问时间:7e-8 ns其他特性:128K X 8 REPROGRAMMABLE EPROM; GENERAL PURPOSE ZPLD, DECODING ZPLD & PERIPHERAL ZPLD
JESD-30 代码:S-PQFP-G68JESD-609代码:e0
I/O 线路数量:40端口数量:5
端子数量:68最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP80,.64SQ
封装形状:SQUARE封装形式:FLATPACK
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not QualifiedROM大小(位):262144 Bits
最大待机电流:0.00004 A子类别:Other Microprocessor ICs
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED紫外线可擦:N
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

PSD501B1-C-70U 数据手册

 浏览型号PSD501B1-C-70U的Datasheet PDF文件第2页浏览型号PSD501B1-C-70U的Datasheet PDF文件第3页浏览型号PSD501B1-C-70U的Datasheet PDF文件第4页浏览型号PSD501B1-C-70U的Datasheet PDF文件第5页浏览型号PSD501B1-C-70U的Datasheet PDF文件第6页浏览型号PSD501B1-C-70U的Datasheet PDF文件第7页 
PSD5XX  
ZPSD5XX  
Low Cost Field Programmable Microcontroller Peripherals  
NOT FOR NEW DESIGN  
FEATURES SUMMARY  
Single Supply Voltage:  
– 5 V±10% for PSD5XX  
– 2.7 to 5.5 V for PSD5XX-V  
Up to 1 Mbit of UV EPROM  
Up to 16 Kbit SRAM  
Input Latches  
Figure 1. Packages  
Programmable I/O ports  
Page Logic  
Programmable Security  
PLDCC68 (J)  
CLDCC68 (L)  
TQFP68 (U)  
January 2002  
1/3  
This is information on a product still in production but not recommended for new designs.  

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