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PSD4135F1V-70B81 PDF预览

PSD4135F1V-70B81

更新时间: 2024-11-13 22:07:03
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
93页 498K
描述
Flash In-System-Programmable Peripherals for 16-Bit MCUs

PSD4135F1V-70B81 数据手册

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PSD4135G2  
Flash In-System-Programmable Peripherals  
for 16-Bit MCUs  
PRELIMINARY DATA  
FEATURES SUMMARY  
5 V±10% Single Supply Voltage:  
Figure 1. Packages  
Up to 4 Mbit of Primary Flash Memory (8  
uniform sectors)  
256Kbit Secondary Flash Memory (4 uniform  
sectors)  
Up to 64 Kbit SRAM  
Over 3,000 Gates of PLD: DPLD and CPLD  
52 Reconfigurable I/O ports  
Enhanced JTAG Serial Port  
Programmable power management  
High Endurance:  
– 100,000 Erase/Write Cycles of Flash Memory  
– 1,000 Erase/Write Cycles of PLD  
TQFP80 (U)  
January 2002  
1/3  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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