Datasheet > PSA0951A_10

PSA0951A_10

更新时间： 2024-11-24 10:04:31

品牌	Logo	应用领域
ZCOMM		/
页数	文件大小	规格书
2页	82K
描述
PHASE LOCKED LOOP

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中文翻译

获取价格

数据手册

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PSA0951A_10 数据手册

PSA0951A

PHASE LOCKED LOOP

14118 Stowe Drive, Suite B | Poway, CA 92064

TEL: (858) 621-2700 | FAX: (858) 486-1927

Rev A1

PHASE NOISE (1 Hz BW, typical)

-70

-90

-110

-130

-150

-170

FEATURES

• Frequency Range:

• Step Size:

950 -

956 MHz

KHz

•

- Style Package

PLL-24

APPLICATIONS

• Basestations

• Satellite Communications

1 E+3

10 E+3

100 E+3

1 E+6

Mobile Radios

•

VALUE

950 - 956

UNITS

MHz

PERFORMANCE SPECIFICATIONS

Frequency Range

-100

dBc/Hz

dBc

Phase Noise @ 10 kHz offset (1 Hz BW, typ.)

Harmonic Suppression (2nd, typ.)

Sideband Spurs (typ.)

-15

-65

dBc

Power Output

2.5±2.5

dBm

Load Impedance

Step Size

kHz

1250

Charge Pump Output Current

Switching Speed (typ., adjacent channel)

Startup Lock Time (typ.)

mSec

°C

-40 to 85

Operating Temperature Range

Package Style

PLL-24

POWER SUPPLY REQUIREMENTS

Supply Voltage (Vcc, nom.)

Vdc

Supply Current (Icc, typ.)

All specifications are typical unless otherwise noted and subject to change without notice.

APPLICATION NOTES

• AN-107 : How to Solder Z-COMM VCOs / PLLs

• AN-202 : PLL Functional Description

NOTES:

Reference Oscillator Signal: 5 MHz<

<100 MHz

Frequency Synthesizer: Analog Devices - ADF4106

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