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PPC440SP-AFC667C PDF预览

PPC440SP-AFC667C

更新时间: 2024-11-28 02:52:39
品牌 Logo 应用领域
AMCC PC
页数 文件大小 规格书
85页 1264K
描述
PowerPC 440SP Embedded Processor

PPC440SP-AFC667C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:BGA, BGA783,28X28,40
针数:783Reach Compliance Code:unknown
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
风险等级:5.86地址总线宽度:32
位大小:32边界扫描:YES
最大时钟频率:666.66 MHz外部数据总线宽度:64
格式:FIXED POINT集成缓存:YES
JESD-30 代码:S-PBGA-B783JESD-609代码:e0
长度:29 mm低功率模式:YES
端子数量:783封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA783,28X28,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.5,1.8,2.5,3.3 V
认证状态:Not Qualified座面最大高度:3.27 mm
速度:667 MHz子类别:Microprocessors
最大压摆率:3000 mA最大供电电压:1.575 V
最小供电电压:1.425 V标称供电电压:1.5 V
表面贴装:YES技术:CMOS
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:29 mm
uPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC

PPC440SP-AFC667C 数据手册

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Part Number 440SP  
Revision 1.23 - Sept 26, 2006  
Data Sheet  
PowerPC 440SP Embedded Processor  
Features  
• I2O Messaging Unit with two DMA controllers  
• PowerPC 440 processor core operating at up to  
667MHz with 32-KB I- and D-caches (with parity  
checking)  
• External Peripheral Bus (24-bit Address, 8-bit  
Data) for up to three devices  
• On-chip 256-KB SRAM configurable as L2 Cache  
or Ethernet Packet/Code store memory  
• One Ethernet 10/100/1000 Mbps half- or full-  
duplex interface. Operational modes supported  
are MII and GMII.  
• Selectable Processor:Bus clock ratios (Refer to  
the Clocking chapter in the PPC440SP Embedded  
Processor User’s Manual for details)  
• Programmable Interrupt Controller supports  
interrupts from a variety of sources.  
• Supports up to 4 GB (2 Chip Selects) of 64-bit/32-  
bit SDRAM with ECC  
• Programmable General Purpose Timers (GPT)  
• Three serial ports (16750 compatible UART)  
• Two IIC interfaces  
– DDR1 266-333-400  
– DDR2 400-533-667  
• Three DDR PCI-X interfaces (32-bit or 64-bit) up  
to 133 MHz (DDR 266) with support for  
conventional PCI  
• General Purpose I/O (GPIO) interface available  
• JTAG interface for board level testing  
• Processor can boot from PCI memory  
• XOR Accelerator with DMA controller  
• Optional: High throughput RAID 6 hardware  
acceleration, performs XOR and Galois Field P &  
Q parity computations, supports up to 255 drives  
Description  
Designed specifically to address high-end embedded  
applications for storage, the PowerPC 440SP  
Embedded Processor (PPC440SP) provides a high-  
performance, low power solution that interfaces to a  
wide range of peripherals by incorporating on-chip  
power management features and lower power  
dissipation.  
Technology: CMOS Cu-11, 0.13mm  
Package: 29mm, 783-ball, 1mm pitch, Flip Chip-  
Plastic Ball Grid Array (FC-PBGA)  
Power (estimated): Less than 6W @533MHz  
Supply voltages required: 3.3V, 2.5V, 1.8V, 1.5V  
This chip contains a high-performance RISC  
processor core, a DDR2 SDRAM controller,  
configurable 256KB SRAM to be used as L2 cache or  
software-controlled on-chip memory, three DDR PCI-X  
bus interfaces, an Ethernet interface, an I2O/DMA  
controller, control for external ROM and peripherals,  
optional RAID 6 acceleration, an XOR DMA unit, serial  
ports, IIC interfaces, and general purpose I/O.  
AMCC Proprietary  
1

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