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PO54G374A PDF预览

PO54G374A

更新时间: 2024-11-14 06:04:35
品牌 Logo 应用领域
POTATO 触发器输出元件
页数 文件大小 规格书
6页 558K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

PO54G374A 数据手册

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PO54G374A, PO74G374A  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
10/27/07  
54, 74 Series GHz Logic  
FEATURES:  
DESCRIPTION:  
. Patented technology  
. Specified From –40°C to 85°C, –40°C to 125°C,  
and –55°C to 125°C  
Potato Semiconductor’s PO74G374A is designed for  
world top performance using submicron CMOS  
technology to achieve higher than 600MHz TTL  
/CMOS output frequency with less than 2.4ns  
propagation delay.  
. Operating frequency is faster than 600MHz  
. VCC Operates from 1.65V to 3.6V  
. Propagation delay < 2.4ns max with 15pf load  
. Low input capacitance: 4pf typical  
. Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
. ESD Protection Exceeds JESD 22  
. 5000-VHuman-BodyModel (A114-A)  
. 200-VMachineModel (A115-A)  
. Available in 20pin TSSOP package  
. Available in 20pin Ceramic Dual Flatpack  
. Available in 20pin Leadless Ceramic Chip Carrier  
This dual Octal edge triggered D-type flip-flops are  
designed for 1.65-V to 3.6-V VCC operation.  
Inputs can be driven from either 3.3V or 5V devices.  
This feature allows the use of these devices as  
translators in a mixed 3.3V/5V system environment.  
Pin Configuration  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1Q  
VCC  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
LE  
3
2
1 20 19  
18  
1D  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
6D  
4
5
6
7
8
2D  
17  
16  
15  
14  
2Q  
3Q  
3D  
9 10 11 12 13  
4D  
4Q  
GND  
Pin Description  
Logic Block Diagram  
INPUTS  
OUTPUT  
Q
1
OE  
OE  
LE  
D
11  
LE  
L
L
H
H
L
H
L
H
L
C1  
1D  
2
1Q  
3
1D  
L
X
X
Q0  
Z
H
X
To Seven Other Channels  
1
Copyright © Potato Semiconductor Corporation  

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