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PM8610 PDF预览

PM8610

更新时间: 2024-02-23 06:30:34
品牌 Logo 应用领域
PMC /
页数 文件大小 规格书
2页 43K
描述
SBI Bus Serializer / STS-12 Time Slot Interchange

PM8610 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:BGA, BGA352,26X26,40Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
JESD-30 代码:S-PBGA-B352JESD-609代码:e0
湿度敏感等级:3端子数量:352
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA352,26X26,40封装形状:SQUARE
封装形式:GRID ARRAY电源:1.8,3.3 V
认证状态:Not Qualified子类别:ATM/SONET/SDH ICs
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOMBase Number Matches:1

PM8610 数据手册

 浏览型号PM8610的Datasheet PDF文件第2页 
Preliminary  
PM8610 SBS  
SBI Bus Serializer / STS-12 Time Slot Interchange  
• VT1.5, VT2, STS-1 77.76MHz  
TelecomBus to serial TelecomBus  
switch. Requires J1 byte alignment.  
• With the Narrowband Switch Element,  
PM8620 NSE-20G, the SBS can be  
used to implement a switch fabric  
scaleable to 20Gb/s.  
• With the Narrowband Switch Element,  
PM8621 NSE-8G, the SBS can be  
used to implement a switch fabric  
scaleable to 8Gb/s.  
• Integrates two independent DS0  
granularity Time Slot Interchange  
Switches (full duplex).  
• Nominal latency through the SBS in  
DS0 mode is 125µS. Channel  
Associated Signaling (CAS) latency  
through the SBS in DS0 mode is two  
T1 multiframes (6 ms) or two E1  
multiframes (4 ms).  
• In TelecomBus mode or SBI mode  
without DS0 level switching nominal  
latency through the SBS is <16µS.  
• The Time Slot Interchange Switch  
permits any receive or incoming byte  
from an input tributary to be mapped to  
any outgoing or transmit byte,  
respectively, on the associated output  
tributary.  
• Encodes and decodes byte wide SBI  
bus and SBI336 bus control signals for  
all SBI supported link types and clock  
modes for transport over the serial  
SBI336S interface.  
• Encodes data from the Incoming SBI  
bus or TelecomBus stream to working  
and protect 777.6Mbps LVDS serial  
links with 8B/10B-based encoding.  
• Decodes data from working and  
protect 777.6MHz LVDS serial links  
with 8B/10B-based encoding to the  
Outgoing SBI bus or TelecomBus  
stream.  
• In SBI mode, switches Channel  
Associated Signaling bits, CAS, with all  
DS0 data.  
• Uses 8B/10B-based line coding  
protocol on the serial links to provide  
transition density guarantee and DC  
balance and to offer a greater control  
character vocabulary than the  
standard 8B/10B protocol.  
• Provides optional PRBS generation for  
each LVDS serial data link for off-line  
link verification. PRBS can be  
processed with minimum STS-1  
granularity.  
• Provides hardware and software  
control to coordinate the connection  
mapping of the local device, peer SBS  
devices and companion NSE switch  
devices.  
FEATURES  
• Monolithic integrated circuit that  
implements conversion between byte-  
serial 19.44Mhz SBI bus or 77.76MHz  
SBI336 bus and redundant 777.6Mbps  
bit-serial 8B/10B-base SBI336S bus.  
• SBI converter and TDM time slot  
interchange.  
• Quad byte wide 19.44MHz SBI bus to  
777.6MHz serial SBI336S converter.  
• Byte wide 77.76MHz SBI336 bus to  
777.6MHz serial SBI336S converter.  
• Quad byte wide 19.44MHz  
TelecomBus to serial 777.6MHz  
TelecomBus converter.  
• Byte wide 77.76MHz TelecomBus to  
serial 777.6MHz TelecomBus  
converter.  
• Quad byte wide 19.44 MHz SBI bus to  
byte wide 77.76 MHz SBI bus bridge.  
• Quad byte wide 19.44 MHz  
TelecomBus to byte wide 77.76 MHz  
TelecomBus bridge.  
• DS0, NxDS0, T1, E1, VT1.5, VT2, DS3  
and E3 granular quad SBI to serial  
SBI336S time slot interchange.  
• DS0, NxDS0, T1, E1, VT1.5, VT2, DS3  
and E3 granular SBI336 to serial  
SBI336S time slot interchange.  
• VT1.5, VT2, STS-1 quad 19.44MHz  
TelecomBus to serial TelecomBus  
switch. Requires J1 byte alignment.  
• Supports working and protect serial  
SBI336 or TelecomBus links to support  
a redundant switch fabric architecture.  
BLOCK DIAGRAM  
Telecom/SBI Bus  
Transmit  
Working  
LVDS  
1/2 WORKING  
TRANSMIT WORKING  
Input User  
Message  
PRBS processing and In- Encoder/Serializer and  
Band Link Controller  
1/2 PROTECT  
Incoming Memory  
Switch Unit and  
CAS Processing  
LVDS Interface  
Telecom/SBI Bus  
TRANSMIT PROTECT  
Connect Memory  
Control  
Transmit  
Protect  
LVDS  
PRBS processing and In- Encoder/Serializer and  
Band Link Controller  
LVDS Interface  
1/2 WORKING  
RECEIVE WORKING  
Receive  
Working  
LVDS  
PRBS processing and In- Decoder, Data recovery  
Band Link Controller  
and LVDS Interface  
Outgoing Memory  
Switch Unit and  
CAS Processing  
Telecom/SBI Bus  
1/2 PROTECT  
RECEIVE PROTECT  
Receive  
Protect  
LVDS  
Connect Memory  
Control  
PRBS processing and In- Decoder, Data recovery  
Band Link Controller and LVDS Interface  
Telecom/SBI Bus  
Microprocessor  
Interface  
Output User  
Message  
JTAG  
PMC-2000169 (P4)  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
© Copyright PMC-Sierra, Inc. 2001  

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