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PM49FL004T-33VC PDF预览

PM49FL004T-33VC

更新时间: 2024-11-17 22:25:59
品牌 Logo 应用领域
PMC 闪存内存集成电路光电二极管PC
页数 文件大小 规格书
46页 208K
描述
2 Mbit / 4 Mbit 3.3 Volt-only Firmware Hub/LPC Flash Memory

PM49FL004T-33VC 数据手册

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PMC  
Pm49FL002 / Pm49FL004  
2 Mbit / 4 Mbit 3.3 Volt-only Firmware Hub/LPC Flash Memory  
FEATURES  
-
Single Power Supply Operation  
Low voltage range: 3.0 V - 3.6 V  
Firmware HUB (FWH)/Low Pin Count  
(LPC) Mode  
-
-
33 MHz synchronous operation with PCI bus  
5-signal communication interface for in-  
system read and write operations  
Standard SDP Command Set  
Data# Polling and Toggle Bit features  
Register-based read and write protection for  
each block (FWH mode only)  
-
-
Standard Intel Firmware Hub/LPC Inter-  
face  
Read compatible to Intel® 82802 Firmware  
Hub devices  
-
-
-
Conforms to Intel LPC Interface Specification  
Revision 1.1  
-
4 ID pins for multiple Flash chips selection  
(FWH mode only)  
Memory Configuration  
-
-
Pm49FL002: 256K x 8 (2 Mbit)  
Pm49FL004: 512K x 8 (4 Mbit)  
-
-
5 GPI pins for General Purpose Input Register  
TBL# pin for hardware write protection to Boot  
Block  
-
WP# pin for hardware write protection to whole  
memory array except Boot Block  
Cost Effective Sector/Block Architecture  
Pm49FL002: Sixty-four uniform 4 Kbyte  
sectors, or sixteen uniform 16 Kbyte blocks  
(sector group)  
Pm49FL004: One hundred and twenty-eight  
uniform 4 Kbyte sectors, or eight uniform 64  
Kbyte blocks (sector group)  
-
-
-
Address/Address Multiplexed (A/A Mux)  
Mode  
11-pin multiplexed address and 8-pin data I/O  
interface  
Supports fast programming on EPROM  
programmers  
-
Top Boot Block  
-
-
Pm49FL002: 16 Kbyte top Boot Block  
Pm49FL004: 64 Kbyte top Boot Block  
-
-
Standard SDP Command Set  
Data# Polling and Toggle Bit features  
-
Automatic Erase and Program Operation  
Build-in automatic program verification for  
extended product endurance  
-
-
Lower Power Consumption  
Typical 2 mA active read current  
Typical 7 mA program/erase current  
-
-
Typical 25 µs/byte programming time  
Typical 50 ms sector/block/chip erase time  
-
High Product Endurance  
Guarantee 100,000 program/erase cycles per  
single sector (preliminary)  
-
Two Configurable Interfaces  
In-System hardware interface: Auto detection  
of Firmware Hub (FWH) or Low Pin Count  
(LPC) memory cycle for in-system read and  
write operations  
Address/Address-Multiplexed (A/A Mux)  
interface for programming on EPROM Pro-  
grammers during manufacturing  
-
Minimum 20 years data retention  
-
-
-
Compatible Pin-out and Packaging  
32-pin (8 mm x 14 mm) VSOP  
32-pin PLCC  
-
Optional lead-free (Pb-free) package  
Hardware Data Protection  
Programmable Microelectronics Corp.  
PMC and P-Flash are registered trademark of Programmable Microelectronics Corporation.  
Issue Date: December, 2003 Rev:1.4  
1
Intel is a registered trademark of Intel Corporation.  

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