dsPIC30F
M
dsPIC™ High-Performance 16-bit
Digital Signal Controller Family Overview
• Compare / PWM outputs functions (up to 8 pins)
High Performance CPU:
- 16-bit, max resolution 33.3 ns (TCY)
- Dual Compare mode available
• Motor control PWM module
• C-compiler optimized instruction set architecture
• 94 Base instructions
- Flexible addressing modes
• Quadrature encoder module
• Linear program memory addressing up to 4M x
24-bit
• Data Converter Interface (DCI), supports common
audio CODEC protocols
- Including I2S, AC’97
• 3-wire SPI™ modules (Supports all 4 SPI modes)
• I2C™ module (supports full multi - master / slave
mode and 7-bit/10-bit addressing)
• Linear data memory up to 64K bytes
• Up to 144K bytes on-chip FLASH program mem-
ory
- 48K single word instructions (initially)
• Up to 8K bytes on-chip data RAM
• Up to 4K bytes EEPROM
• Addressable UART modules: Supports Interrupt
on Address bit and Wake-up on Start Bit Detection
• Two 40-bit wide accumulators with optional satu-
ration logic
• CAN Bus modules
• As many as 54 programmable digital I/O pins
- Some with interrupt on change
• 16 x 16-bit working register array
• Up to 30 MIPs operation:
- DC - 120 MHz clock input
Advanced Analog Features:
- 4 MHz - 10 MHz osc./clock input with PLL
active (4X, 8X, 16X)
• 10-Bit Analog-to-Digital Converters (A/D) with:
- 16 input channels, typically
• 24-bit wide instructions, 16-bit wide data path
- 500 ksps conversion rate
• Dual Address Generation Units enabling dual
data fetch for DSP operations
- Conversion available during sleep
• 12-Bit Analog-to-Digital Converters (A/D) with:
- 16 input channels, typically
• Up to 32 interrupt sources
• 15 Exception Vectors (8 interrupts & 7 Traps)
- Programmable Priority levels for 8 interrupts
- 100 ksps conversion rate
- 3 cycle fixed latency; 1 “fast” at 1 cycle
- Conversion available during sleep
• Programmable Low Voltage detection (LVD)
- Supports interrupt on low voltage detection
• Programmable Brown-out Reset generation
• 16 x 16 Single Cycle Hardware Fractional/Integer
Multiplier
• Single Cycle Multiply-Accumulate (MAC) opera-
tion
Special Microcontroller Features:
• 40 stage Barrel Shifter
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
Peripheral Features:
• High current sink/source I/O pins 25 mA/25 mA
• Multiple external interrupt pins
• Timer module:
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Fail safe clock monitor operation
• Programmable code protection
• Selectable Power Management modes
- Five 16-bit timers/counters
- 4 of the timers may be optionally configured
as two 32-bit timer/counter
- SLEEP mode, IDLE mode, SLOWDOWN
mode
• 32 kHz real-time clock support on Timer1
• Capture Input functions (16-bit, up to 8 pins)
2001 Microchip Technology Inc.
Advance Information
DS70025D-page 1