PIC18F6625/6721/8625/8721
64/80-Pin High-Performance, 1-Mbit Enhanced Flash
Microcontrollers with A/D and nanoWatt Technology
Power Managed Modes:
Peripheral Highlights (Continued):
• Run: CPU on, peripherals on
• Idle: CPU off, peripherals on
• Three Enhanced Capture/Compare/PWM (ECCP)
modules:
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead-time
• Sleep: CPU off, peripherals off
• Idle mode currents down to 5.8 µA typical
• Sleep current down to 0.1 µA typical
• Timer1 Oscillator: 1.8 µA, 32 kHz, 2V
• Watchdog Timer: 2.1 µA
- Auto-Shutdown and Auto-Restart
• Two Master Synchronous Serial Port (MSSP)
modules supporting 3-wire SPI™ (all 4 modes) and
• Two-Speed Oscillator Start-up
2
I C™ Master and Slave modes
• Two Enhanced Addressable USART modules:
- Supports RS-485, RS-232 and LIN 1.2
- RS-232 operation using internal oscillator block
(no external crystal required)
- Auto-wake-up on Start bit
- Auto-baud detect
Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4X Phase Lock Loop (available for crystal and
internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal oscillator block:
• 10-bit, up to 16-channel Analog-to-Digital Converter
module (A/D)
- 8 user selectable frequencies, from 31 kHz to 8 MHz
- Provides a complete range of clock speeds from
31 kHz to 32 MHz when used with PLL
- User tunable to compensate for frequency drift
• Secondary oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
- Auto-acquisition capability
- Conversion available during Sleep
• Dual analog comparators with input multiplexing
Special Microcontroller Features:
• C compiler optimized architecture:
- Optional extended instruction set designed to
optimize re-entrant code
• 100,000 erase/write cycle Enhanced Flash program
memory typical
- Allows for safe shutdown if peripheral clock stops
External Memory Interface
(PIC18F8625/8721 only):
• Address capability of up to 2 Mbytes
• 8-bit or 16-bit interface
• 1,000,000 erase/write cycle Data EEPROM memory
typical
• Flash/Data EEPROM Retention: 100 years typical
• Self-programmable under software control
• Priority levels for interrupts
• 8 X 8 Single Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-supply 5V In-Circuit Serial Programming™
(ICSP™) via two pins
Peripheral Highlights:
• High current sink/source 25 mA/25 mA
• Four programmable external interrupts
• Four input change interrupts
• Two Capture/Compare/PWM (CCP) modules
• In-Circuit Debug (ICD) via two pins
• Wide operating voltage range: 2.0V to 5.5V
Program Memory
Data Memory
MSSP
CCP/
10-bit
A/D (ch)
# Single-
Flash
Device
I/O
ECCP
SRAM EEPROM
(bytes) (bytes)
Master
I C
Word
Instructions
SPI
2
(PWM)
(bytes)
PIC18F6625
96 K
49152
65536
49152
65536
3936
3936
3936
3936
1024
1024
1024
1024
54
54
70
70
12
12
16
16
2/3
2/3
2/3
2/3
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
2
2
2
2
2
2
2
2
2/3
2/3
2/3
2/3
N
N
Y
Y
PIC18F6721 128 K
PIC18F8625 96 K
PIC18F8721 128 K
2004 Microchip Technology Inc.
DS39627A-page 1