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PIC16F19185T-E/PQTP

更新时间： 2024-11-24 02:31:19
品牌 Logo 应用领域
美国微芯 - MICROCHIP 微控制器
页数 文件大小 规格书
754页 11306K
描述
Full-Featured 28/40/44/48-Pin Microcontrollers

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PIC16F19185T-E/PQTP 数据手册

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PIC16(L)F19155/56/75/76/85/86  
Full-Featured 28/40/44/48-Pin Microcontrollers  
Description  
PIC16(L)F19155/56/75/76/85/86 microcontrollers offer eXtreme Low-Power (XLP) LCD drive coupled with Core  
Independent Peripherals (CIPs) and Intelligent Analog. They are especially suited for battery-powered LCD applications  
due to an integrated charge pump, high current I/O drive for backlighting, and battery backup of the Real-Time Clock/  
Calendar (RTCC). Active clock tuning of the HFINTOSC provides a highly accurate clock source over voltage and  
temperature. The family also features a new 12-bit ADC controller which can automate Capacitive Voltage Divider  
(CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and automatic threshold comparison.  
Other new features include low-power Idle and Doze modes, Device Information Area (DIA), and Memory Access  
Partition (MAP). These low-power products are available in 28/40/44 and 48 pins to support the customer in various  
LCD and general purpose applications.  
Core Features  
Operating Characteristics  
• C Compiler Optimized RISC Architecture  
• Operating Speed:  
- DC – 32 MHz clock input  
- 125 ns minimum instruction cycle  
• Interrupt Capability  
• Operating Voltage Range:  
- 1.8V to 3.6V (PIC16LF19155/56/75/76/85/  
86)  
- 2.3V to 5.5V (PIC16F19155/56/75/76/85/86)  
• Temperature Range:  
• 16-Level Deep Hardware Stack  
• Timers:  
- Industrial: -40°C to 85°C  
- Extended: -40°C to 125°C  
- Two 8-bit (TMR2/4) Timer with Hardware  
Limit Timer Extension (HLT)  
Power-Saving Functionality  
-
16-bit (TMR0/1)  
• Doze mode: Ability to run CPU core slower than  
the system clock  
• Idle mode: Ability to halt CPU core while internal  
peripherals continue operating  
• Sleep mode: Lowest power consumption  
• Peripheral Module Disable (PMD): Ability to  
disable hardware module to minimize power  
consumption of unused peripherals  
• Low-Current Power-on Reset (POR)  
• Configurable Power-up Timer (PWRTE)  
• Brown-out Reset (BOR) with Fast Recovery  
• Low-Power BOR (LPBOR) Option  
• Windowed Watchdog Timer (WWDT):  
- Variable prescaler selection  
- Variable window size selection  
- All sources configurable in hardware or  
software  
• Programmable Code Protection  
eXtreme Low-Power (XLP) Features  
• Sleep mode: 50 nA @ 1.8V, typical  
• Watchdog Timer: 500 nA @ 1.8V, typical  
• Secondary Oscillator: 500 nA @ 32 kHz  
• Operating Current:  
- 8 µA @ 32 kHz, 1.8V, typical  
- 32 µA/MHz @ 1.8V, typical  
Memory  
• Up to 16kW/28KB Flash Program Memory  
• Up to 2KB Data SRAM Memory  
• 256 bytes DataEE  
• Direct, Indirect and Relative Addressing modes  
• Memory Access Partition (MAP):  
- Bootloader write-protect  
Digital Peripherals  
- Custom partition  
• LCD Controller:  
- Up to 248 segments  
- Charge pump for low-voltage operation  
- Contrast control  
• Four Configurable Logic Cell Modules (CLC):  
- Integrated combinational and sequential logic  
• Device Information Area (DIA):  
- Temp sensor factory calibrated data  
- Fixed Voltage Reference  
- Device ID  
2017-2019 Microchip Technology Inc.  
DS40001923B-page 1  
1234567...754

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