PI6ULS5V9509
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Level Translating I2C-Bus/SMBus Repeater with Tiny Package
Features
Description
Bidirectional buffer isolates capacitance and allows
400 pF on port B of the device
The PI6ULS5V9509 is a level translating I2C-
bus/SMBus repeater. It can provide bidirectional level
translation between low voltage (down to 1.1V) and
higher voltage (2.5V to 5.5V) in mixed-mode
applications. And it enables I2C and similar bus system
to be extended, without degradation of performance
even during level shifting.
Port A operating supply voltage range of 1.1 V to
VCC(B) - 1.0V
Port B operating supply voltage range of 2.5 V to
5.5 V
Voltage level translation from 1.1V to VCC(B)
1.0V and from 2.5 V to 5.5 V
-
The PI6ULS5V9509 enables the system designer to
isolate two halves of a bus for both voltage and
capacitance, accommodating more I2C devices or longer
trace length. It also permits extension of the I2C-bus by
providing bidirectional buffering for both the data (SDA)
and the clock (SCL) lines, thus allowing two buses of
400 pF to be connected in an I2C application.
The bus port B drivers are compliant with SMBus
I/O levels, while port A uses a current sensing
mechanism to detect the input or output LOW signal
which prevents bus lock-up. Port A uses a 1 mA current
source for pull-up and a 200Ω pull-down driver. This
result in a LOW on the port A accommodating smaller
voltage swings. The output pull-down on the port A
internal buffer LOW is set for approximately 0.2V,
while the input threshold of the internal buffer is set
about 50 mV lower than that of the output voltage LOW.
When the port A I/O is driven LOW internally, the LOW
is not recognized as a LOW by the input. This prevents a
lock-up condition from occurring. The output pull-down
on the port B drives a hard LOW and the input level is
set at 0.3 of SMBus or I2C-bus voltage level which
enables port B to connect to any other I2C-bus devices or
buffer.
Requires no external pull-up resistors on lower
voltage port A
Open-drain port B inputs/outputs
Lock-up free operation
Supports arbitration and clock stretching across the
repeater
Accommodates Standard-mode and Fast-mode I2C-
bus devices and multiple masters
Powered-off high-impedance I2C-bus pins
5 V tolerant B SCL, SDA and enable pins
0 Hz to 400 kHz clock frequency (Remark: The
maximum system operating frequency may be less
than 400 kHz because of the delays added by the
repeater.)
ESD protection exceeds 8KV HBM per JESD22-
A114
Package: MSOP-8, SOIC-8 and UQFN1.6x1.6-8L
Pin Configuration
The PI6ULS5V9509 drivers are not enabled unless
VCC(A) is above 0.8 V and VCC(B) is above 2.5 V. The
enable (EN) pin can also be used to turn the drivers on
and off under system control. Caution should be
observed to only change the state of the EN pin when the
bus is idle.
SOIC-8 and MSOP-8
Pin Description
Pin No Pin Name
Description
1
2
3
4
5
6
7
8
VCC(A)
A1
A2
GND
EN
B2
port A supply voltage
port A (lower voltage side)
port A (lower voltage side)
supply ground (0 V)
active HIGH repeater enable input
port B (SMBus/I2C-bus side)
port B (SMBus/I2C-bus side)
port B supply voltage
B1
VCC(B)
UQFN1.6x1.6-8L(Top View)
2015-04-0005
PT0460-3
04/20/15
1
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