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PI6C5912016-01FAIEX PDF预览

PI6C5912016-01FAIEX

更新时间: 2024-11-21 21:18:39
品牌 Logo 应用领域
美台 - DIODES 驱动逻辑集成电路
页数 文件大小 规格书
12页 1246K
描述
Low Skew Clock Driver,

PI6C5912016-01FAIEX 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknownFactory Lead Time:13 weeks
风险等级:5.74逻辑集成电路类型:LOW SKEW CLOCK DRIVER
Base Number Matches:1

PI6C5912016-01FAIEX 数据手册

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A product Line of  
Diodes Incorporated  
PI6C5912016-01  
16 Output LVPECL Fanout Buffer  
Features  
Description  
Î16 Differential LVPECL outputs  
e PI6C5912016-01 is a high performance LVPECL fanout buf-  
fer device which supports up to 2GHz frequency. is device is  
ideal for systems that need to distribute low jitter LVPECL clock  
signals to multiple destinations.  
Î2 Selectable reference inputs support either single-ended  
or differential  
ÎUp to 2GHz output frequency  
ÎUltra low additive phase jitter: < 0.01 ps (typ) (differential  
156.25MHz, 12KHz to 20MHz integration range)  
Applications  
ÎLow skew between outputs  
ÎNetworking systems including switches and routers  
ÎLow delay from input to output  
ÎSeparate Input output supply voltage for level shiꢀing  
Î2.5V / 3.3V power supply  
ÎHigh frequency backplane based computing and telecom  
platforms  
ÎIndustrial temperature support  
ÎTQFP-48 package  
Block Diagram  
Pin Configuration (48-Pin TQFP)  
VDD  
VDDO  
48 47 46 45 44 43 42 41 40 39 38 37  
1
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
V
DDO  
REF_IN+  
2
Q11+  
Q11-  
Q10+  
Q10-  
V
DDO  
3
Q0-  
Q0+  
Q1-  
Q1+  
4
Q[0:15]+  
Q[0:15]-  
5
REF_IN+  
REF_IN-  
6
16  
V
EE  
7
Q9+  
Q9-  
Q8+  
Q8-  
V
EE  
8
Q2-  
Q2+  
Q3-  
Q3+  
9
10  
11  
12  
V
DDO  
V
DD  
V
DDO  
13 14 15 16 17 18 19 20 21 22 23 24  
GND  
www.diodes.com  
June 2018  
Diodes Incorporated  
PI6C5912016-01  
Document Number DS40081 Rev 1-2  
1

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